424 lines
12 KiB
C
Executable File
424 lines
12 KiB
C
Executable File
#ifndef __TP2802_H__
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#define __TP2802_H__
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enum{
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TP2802C=0x0200,
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TP2802D=0x0201,
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TP2804 =0x0400,
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TP2806 =0x0401,
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TP2822 =0x2200,
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TP2823 =0x2300,
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TP2834 =0x2400,
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TP2833 =0x2301,
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TP2853C=0x2600,
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TP2833C=0x2610,
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TP2823C=0x2618,
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TP2826 =0x2601,
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TP2816 =0x2619,
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TP2827 =0x2611,
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TP2827C=0x270C,
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TP2826C=0x260C,
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TP2828 =0x2800,
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TP2829 =0x2900
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};
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enum{
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TP2802_1080P25 = 0x03,
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TP2802_1080P30 = 0x02,
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TP2802_720P25 = 0x05,
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TP2802_720P30 = 0x04,
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TP2802_720P50 = 0x01,
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TP2802_720P60 = 0x00,
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TP2802_SD = 0x06,
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INVALID_FORMAT = 0x07,
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TP2802_720P25V2= 0x0D,
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TP2802_720P30V2= 0x0C,
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TP2802_PAL = 0x08,
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TP2802_NTSC = 0x09,
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TP2802_HALF1080P25 = 0x43,
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TP2802_HALF1080P30 = 0x42,
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TP2802_HALF720P25 = 0x45,
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TP2802_HALF720P30 = 0x44,
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TP2802_HALF720P50 = 0x41,
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TP2802_HALF720P60 = 0x40,
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//TP2802_A1080P25 = 0x13,
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//TP2802_A1080P30 = 0x12,
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//TP2802_AHALF1080P25 = 0x53,
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//TP2802_AHALF1080P30 = 0x52,
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//TP2802_A720P25 = 0x1D,
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//TP2802_A720P30 = 0x1C,
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TP2802_3M18 = 0x20, //2048x1536@18.75 for TVI
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TP2802_5M12 = 0x21, //2592x1944@12.5 for TVI
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TP2802_4M15 = 0x22, //2688x1520@15 for TVI
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TP2802_3M20 = 0x23, //2048x1536@20 for TVI
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TP2802_4M12 = 0x24, //2688x1520@12.5 for TVI
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TP2802_6M10 = 0x25, //3200x1800@10 for TVI
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TP2802_QHD30 = 0x26, //2560x1440@30 for TVI/HDA/HDC
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TP2802_QHD25 = 0x27, //2560x1440@25 for TVI/HDA/HDC
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TP2802_QHD15 = 0x28, //2560x1440@15 for HDA
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TP2802_QXGA18 = 0x29, //2048x1536@18 for HDA/TVI
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TP2802_QXGA30 = 0x2A, //2048x1536@30 for HDA
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TP2802_QXGA25 = 0x2B, //2048x1536@25 for HDA
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TP2802_4M30 = 0x2C, //2688x1520@30 for TVI(for future)
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TP2802_4M25 = 0x2D, //2688x1520@25 for TVI(for future)
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TP2802_5M20 = 0x2E, //2592x1944@20 for TVI/HDA
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TP2802_8M15 = 0x2f, //3840x2160@15 for TVI
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TP2802_8M12 = 0x30, //3840x2160@12.5 for TVI
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TP2802_1080P15 = 0x31, //1920x1080@15 for TVI
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TP2802_1080P60 = 0x32, //1920x1080@60 for TVI
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TP2802_960P30 = 0x33, //1280x960@30 for TVI
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TP2802_1080P20 = 0x34 //1920x1080@20 for TVI
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};
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enum{
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VIDEO_UNPLUG,
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VIDEO_IN,
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VIDEO_LOCKED,
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VIDEO_UNLOCK
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};
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enum{
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SDR_1CH, //148.5M mode
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SDR_2CH, //148.5M mode
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DDR_2CH, //297M mode, support from TP2822/23
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DDR_4CH, //297M mode, support from TP2824/33
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DDR_1CH //297M mode, support from TP2827
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};
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enum{
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CH_1=0, //
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CH_2=1, //
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CH_3=2, //
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CH_4=3, //
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CH_ALL=4,
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DATA_PAGE=5,
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AUDIO_PAGE=9
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};
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enum{
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SCAN_DISABLE=0,
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SCAN_AUTO,
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SCAN_TVI,
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SCAN_HDA,
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SCAN_HDC,
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SCAN_MANUAL,
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SCAN_TEST
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};
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enum{
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STD_TVI,
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STD_HDA,
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STD_HDC,
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STD_HDA_DEFAULT,
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STD_HDC_DEFAULT
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};
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enum{
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PTZ_TVI=0,
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PTZ_HDA_1080P=1,
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PTZ_HDA_720P=2,
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PTZ_HDA_CVBS=3,
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PTZ_HDC=4,
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PTZ_HDA_3M18=5, //HDA QXGA18
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PTZ_HDA_3M25=6, //HDA QXGA25,QXGA30
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PTZ_HDA_4M25=7, //HDA QHD25,QHD30,5M20
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PTZ_HDA_4M15=8, //HDA QHD15,5M12.5
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PTZ_HDC_QHD=9, //HDC QHD25,QHD30
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PTZ_HDC_FIFO=10, //HDC 1080p,720p FIFO
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PTZ_HDC_8M=11 //HDC 8M15/12.5
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};
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enum{
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PTZ_RX_TVI_CMD,
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PTZ_RX_TVI_BURST,
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PTZ_RX_ACP1,
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PTZ_RX_ACP2,
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PTZ_RX_ACP3,
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PTZ_RX_TEST,
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PTZ_RX_HDC1,
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PTZ_RX_HDC2
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};
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#define FLAG_LOSS 0x80
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#define FLAG_H_LOCKED 0x20
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#define FLAG_HV_LOCKED 0x60
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//#define FLAG_HDC_MODE 0x80 //video standard is in std[]
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#define FLAG_HALF_MODE 0x40
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#define FLAG_MEGA_MODE 0x20
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//#define FLAG_HDA_MODE 0x10 //video standard is in std[]
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#define CHANNELS_PER_CHIP 4
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#define MAX_CHIPS 4
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#define SUCCESS 0
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#define FAILURE -1
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#define BRIGHTNESS 0x10
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#define CONTRAST 0x11
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#define SATURATION 0x12
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#define HUE 0X13
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#define SHARPNESS 0X14
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#define MAX_COUNT 0xffff
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typedef struct _tp2802_register
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{
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unsigned char chip;
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unsigned char ch;
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unsigned int reg_addr;
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unsigned int value;
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} tp2802_register;
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typedef struct _tp2802_work_mode
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{
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unsigned char chip;
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unsigned char ch;
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unsigned char mode;
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} tp2802_work_mode;
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typedef struct _tp2802_video_mode
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{
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unsigned char chip;
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unsigned char ch;
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unsigned char mode;
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unsigned char std;
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} tp2802_video_mode;
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typedef struct _tp2802_video_loss
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{
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unsigned char chip;
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unsigned char ch;
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unsigned char is_lost;
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} tp2802_video_loss;
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typedef struct _tp2802_image_adjust
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{
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unsigned char chip;
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unsigned char ch;
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unsigned int hue;
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unsigned int contrast;
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unsigned int brightness;
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unsigned int saturation;
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unsigned int sharpness;
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} tp2802_image_adjust;
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typedef struct _tp2802_PTZ_data
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{
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unsigned char chip;
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unsigned char ch;
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unsigned char mode;
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unsigned char data[16];
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} tp2802_PTZ_data;
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typedef enum _tp2802_audio_samplerate
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{
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SAMPLE_RATE_8000,
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SAMPLE_RATE_16000,
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} tp2802_audio_samplerate;
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typedef struct _tp2802_audio_playback
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{
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unsigned int chip;
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unsigned int chn;
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} tp2802_audio_playback;
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typedef struct _tp2802_audio_da_volume
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{
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unsigned int chip;
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unsigned int volume;
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} tp2802_audio_da_volume;
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typedef struct _tp2802_audio_da_mute
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{
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unsigned int chip;
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unsigned int flag;
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} tp2802_audio_da_mute;
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typedef struct _tp2833_audio_format
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{
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unsigned int chip;
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unsigned int chn;
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unsigned int format; /* 0:i2s; 1:dsp */
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unsigned int mode; /* 0:slave 1:master*/
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unsigned int clkdir; /*0:inverted;1:non-inverted*/
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unsigned int bitrate; /*0:256fs 1:320fs*/
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unsigned int precision;/*0:16bit;1:8bit*/
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} tp2833_audio_format;
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/*
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* TP2802 Initialization I2C Tables
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*/
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// Video Format
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unsigned char tbl_tp2802_1080p25_raster[] = {
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// Start address 0x15, Size = 9B
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//0x03, 0xD3, 0x80, 0x29, 0x38, 0x47, 0x00, 0x0A, 0x50
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0x03, 0xD2, 0x80, 0x29, 0x38, 0x48, 0x00, 0x0A, 0x50
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};
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unsigned char tbl_tp2802_1080p30_raster[] = {
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// Start address 0x15, Size = 9B
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0x03, 0xD3, 0x80, 0x29, 0x38, 0x47, 0x00, 0x08, 0x98
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};
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unsigned char tbl_tp2802_720p25_raster[] = {
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// Start address 0x15, Size = 9B
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//0x13, 0x16, 0x00, 0x19, 0xD0, 0x25, 0x00, 0x0F, 0x78 //vin clk 148Mhz
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0x13, 0x16, 0x00, 0x19, 0xD0, 0x25, 0x00, 0x07, 0xBC //vin clk 74Mhz
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};
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unsigned char tbl_tp2802_720p30_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x16, 0x00, 0x19, 0xD0, 0x25, 0x00, 0x0C, 0xE4
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};
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unsigned char tbl_tp2802_720p50_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x16, 0x00, 0x19, 0xD0, 0x25, 0x00, 0x07, 0xBC
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};
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unsigned char tbl_tp2802_720p60_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x16, 0x00, 0x19, 0xD0, 0x25, 0x00, 0x06, 0x72
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};
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unsigned char tbl_tp2802_PAL_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x5f, 0xbc, 0x17, 0x20, 0x17, 0x00, 0x09, 0x48
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};
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unsigned char tbl_tp2802_NTSC_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x4e, 0xbc, 0x15, 0xf0, 0x07, 0x00, 0x09, 0x38
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};
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unsigned char tbl_tp2802_3M_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x6C, 0x00, 0x2C, 0x00, 0x68, 0x00, 0x09, 0xC4 //3M18.75
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};
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unsigned char tbl_tp2802_5M_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x1f, 0x20, 0x34, 0x98, 0x7A, 0x00, 0x0B, 0x9A //5M12.5
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};
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unsigned char tbl_tp2802_4M_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x1f, 0x80, 0x7d, 0xf0, 0x5A, 0x00, 0x0b, 0xb8 //4M15
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};
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unsigned char tbl_tp2802_3M20_raster[] = {
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// Start address 0x15, Size = 9B
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0x03, 0xa0, 0x00, 0x6e, 0x00, 0x68, 0x00, 0x08, 0xca //3M20
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};
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unsigned char tbl_tp2802_4M12_raster[] = {
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// Start address 0x15, Size = 9B
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0x23, 0x4c, 0x80, 0x89, 0xf0, 0x5A, 0x00, 0x0c, 0xe4 //4M12.5
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};
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unsigned char tbl_tp2802_6M10_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0xec, 0x80, 0xb0, 0x08, 0x7c, 0x00, 0x0e, 0xa6 //6M10
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};
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unsigned char tbl_tp2802_QHDH30_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x0f, 0x00, 0x32, 0xa0, 0x55, 0x00, 0x06, 0x72 //half QHD30
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};
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unsigned char tbl_tp2802_QHDH25_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x20, 0x00, 0x20, 0xa0, 0x55, 0x00, 0x07, 0xbc //half QHD30
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};
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unsigned char tbl_tp2802_QHD15_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x0f, 0x00, 0x32, 0xa0, 0x5a, 0x00, 0x0c, 0xe4 //2560x1440p15
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};
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unsigned char tbl_tp2802_QXGAH30_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x10, 0x00, 0x64, 0x00, 0x64, 0x00, 0x05, 0xdc //half QXGA30
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};
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unsigned char tbl_tp2802_QXGAH25_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x0c, 0x00, 0x64, 0x00, 0x64, 0x00, 0x07, 0x08 //half QXGA25
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};
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unsigned char tbl_tp2802_QHD30_raster[] = {
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// Start address 0x15, Size = 9B
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0x23, 0x1b, 0x04, 0x38, 0xa0, 0x5a, 0x00, 0x0c, 0xe2 //TVI/HDA/HDC QHD30
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};
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unsigned char tbl_tp2802_QHD25_raster[] = {
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// Start address 0x15, Size = 9B
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0x23, 0x1b, 0x04, 0x38, 0xa0, 0x5a, 0x00, 0x0f, 0x76 //TVI/HDA/HDC QHD25
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};
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unsigned char tbl_tp2802_QXGA30_raster[] = {
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// Start address 0x15, Size = 9B
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0x23, 0x16, 0x04, 0x68, 0x00, 0x68, 0x00, 0x0b, 0xb6 //HDA 3M30
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};
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unsigned char tbl_tp2802_QXGA25_raster[] = {
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// Start address 0x15, Size = 9B
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0x23, 0x16, 0x04, 0x68, 0x00, 0x68, 0x00, 0x0e, 0x0e //HDA 3M25
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};
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/*
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unsigned char tbl_tp2802_4M30_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x1f, 0x80, 0x7d, 0xf0, 0x5A, 0x00, 0x0b, 0xb6 //TVI 4M30
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};
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unsigned char tbl_tp2802_4M25_raster[] = {
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// Start address 0x15, Size = 9B
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0x23, 0x34, 0x80, 0x8c, 0xf0, 0x5A, 0x00, 0x0c, 0xe2 //TVI 4M25
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};
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*/
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unsigned char tbl_tp2802_5M20_raster[] = {
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// Start address 0x15, Size = 9B
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0x23, 0x36, 0x24, 0x1a, 0x98, 0x7A, 0x00, 0x0e, 0xa4 //5M20
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};
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unsigned char tbl_tp2802_5MH20_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x20, 0x10, 0x1a, 0x98, 0x75, 0x00, 0x07, 0x53 // half 5M20
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};
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/*
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unsigned char tbl_tp2802_4MH30_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x1f, 0x40, 0x7d, 0xf0, 0x55, 0x00, 0x05, 0xdc //TVI half 4M30
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};
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unsigned char tbl_tp2802_4MH25_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x20, 0x40, 0x8c, 0xf0, 0x55, 0x00, 0x06, 0x72 //TVI half 4M25
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};
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*/
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unsigned char tbl_tp2802_8M15_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0xbd, 0x04, 0x50, 0x70, 0x8f, 0x00, 0x11, 0x2e //8M15
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};
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unsigned char tbl_tp2802_8MH15_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0xbd, 0x82, 0x50, 0x70, 0x87, 0x00, 0x08, 0x98 //8M15
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};
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unsigned char tbl_tp2802_8M12_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0xbd, 0x04, 0x50, 0x70, 0x8f, 0x00, 0x14, 0x9e //8M12
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};
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unsigned char tbl_tp2802_8MH12_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0xbd, 0x82, 0x50, 0x70, 0x87, 0x00, 0x0a, 0x50 //8M12
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};
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unsigned char tbl_tp2802_A5M12_raster[] = {
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// Start address 0x15, Size = 9B
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0x13, 0x20, 0x80, 0x14, 0x98, 0x7A, 0x00, 0x0B, 0xb8 //HDA 5M12.5
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};
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// PLLs
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unsigned char tbl_tp2802_common_pll[] = {
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// Start address 0x42, Size = 4B
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0x00, 0x12, 0x07, 0x49
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};
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// Output Enables
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unsigned char tbl_tp2802_common_oe[] = {
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// Start address 0x4B, Size = 11B
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0x10, 0x32, 0x0F, 0xFF, 0x0F, 0x00, 0x0A, 0x0B, 0x1F, 0xFA, 0x27
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};
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// Rx Common
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unsigned char tbl_tp2802_common_rx[] = {
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// Start address 0x7E, Size = 13B
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0x2F, 0x00, 0x07, 0x08, 0x04, 0x00, 0x00, 0x60, 0x10,
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0x06, 0xBE, 0x39, 0xA7
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};
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// IRQ Common
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unsigned char tbl_tp2802_common_irq[] = {
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// Start address 0xB3, Size = 6B
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0xFA, 0x1C, 0x0F, 0xFF, 0x00, 0x00
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};
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#endif
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