/*
 *  Copyright (c) 2019, Tongxin Microelectronics Co., Ltd. 
 *  All rights reserved.
 * 
 *  FileName: DCMI_Com.h
 *  SCFID: 
 *  Feature: It is the header file for operation.c
 *  Version: V0.1
 * 
 *  History: 
 *    2019-03-20
 *      1. Original version 0.1
 * */
 
#ifndef _DCMI_COM_H
#define _DCMI_COM_H
#ifdef __cplusplus
 extern "C" {
#endif

#include "global.h"
	 
#define CAMERA_TIMEOUE (12000 * 150)
	
#define HAL_DCMI_ERROR_NONE      0x00000000U    /*!< No error              */
#define HAL_DCMI_ERROR_OVR       0x00000001U    /*!< Overrun error         */
#define HAL_DCMI_ERROR_SYNC      0x00000002U    /*!< Synchronization error */
#define HAL_DCMI_ERROR_TIMEOUT   0x00000020U    /*!< Timeout error         */
#define HAL_DCMI_ERROR_DMA       0x00000040U    /*!< DMA error             */

#define DMA_IT_TC_OFFS			 0x00000001UL
#define DMA_IT_ERR_OFFS			 0x00000100UL
#define TMC_TIMEOUT_DMA_ABORT    5U  /* 5 ms */

#define TMC_DMA_ERROR_NONE				0x00000000U		/*!< No error                               */
#define TMC_DMA_ERROR_TE				0x00000001U		/*!< Transfer error                         */
#define TMC_DMA_ERROR_TIMEOUT			0x00000020U		/*!< Timeout error                          */
#define TMC_DMA_ERROR_PARAM				0x00000040U		/*!< Parameter error                        */
#define TMC_DMA_ERROR_NO_XFER			0x00000080U		/*!< Abort requested with no Xfer ongoing   */
#define TMC_DMA_ERROR_NOT_SUPPORTED		0x00000100U		/*!< Not supported mode                     */

#define RCC_ClockSource_HSE             0x00000001UL
#define RCC_ClockSource_HSI             0x00000002UL
#define RCC_ClockSource_LSE             0x00000004UL
#define RCC_ClockSource_LSI             0x00000008UL
#define RCC_ClockSource_PLL             0x00000010UL


#define IS_RCC_CLOCKSOURCE(SPURCE)					(((SPURCE) == RCC_ClockSource_HSE)   	|| \
													 ((SPURCE) == RCC_ClockSource_HSI)   	|| \
													 ((SPURCE) == RCC_ClockSource_LSE)   	|| \
													 ((SPURCE) == RCC_ClockSource_LSI)		|| \
													 ((SPURCE) == RCC_ClockSource_PLL))

typedef struct
{
	u32 source_addr;
	u32 dest_addr;
	u32 lli_addr;
	u32 ctrl;
}LLI_StructTypeDef;

typedef enum
{
	TMC_DMA_STATE_RESET				= 0x00U,  /*!< DMA not yet initialized or disabled */
	TMC_DMA_STATE_READY				= 0x01U,  /*!< DMA initialized and ready for use   */
	TMC_DMA_STATE_BUSY				= 0x02U,  /*!< DMA process is ongoing              */
	TMC_DMA_STATE_TIMEOUT			= 0x03U,  /*!< DMA timeout state                   */
	TMC_DMA_STATE_ERROR				= 0x04U,  /*!< DMA error state                     */
	TMC_DMA_STATE_ABORT				= 0x05U,  /*!< DMA Abort state                     */
}TMC_DMA_StateTypeDef;

/** 
  * @brief  HAL DMA Error Code structure definition
  */
typedef enum
{
	HAL_DMA_XFER_CPLT_CB_ID			= 0x00U,  /*!< Full transfer     */
	HAL_DMA_XFER_ERROR_CB_ID		= 0x04U,  /*!< Error             */
	HAL_DMA_XFER_ABORT_CB_ID		= 0x05U,  /*!< Abort             */
	HAL_DMA_XFER_ALL_CB_ID			= 0x06U   /*!< All               */
}TMC_DMA_CallbackIDTypeDef;


typedef struct __DMA_HandleTypeDef
{
	DMA_Channel_TypeDef			*Instance;															/*!< Register base address*/
	DMA_InitTypeDef				Init;																/*!< DMA communication parameters*/ 
	HAL_LockTypeDef				Lock;																/*!< DMA locking object*/  
	__IO TMC_DMA_StateTypeDef	State;																/*!< DMA transfer state*/
	void						*Parent;															/*!< Parent object state*/
	void						(* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma);			/*!< DMA transfer complete callback*/
	void						(* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma);			/*!< DMA transfer error callback*/	
	void						(* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma);			/*!< DMA transfer Abort callback*/  
	__IO uint32_t				ErrorCode;															/*!< DMA Error code*/
	uint32_t					StreamIndex;														/*!< DMA Stream Index*/	
	uint32_t					LLI;																/*!< DMA LLI ADDRESS*/ 
}DMA_HandleTypeDef;

typedef enum
{
	HAL_DCMI_STATE_RESET             = 0x00U,  /*!< DCMI not yet initialized or disabled  */
	HAL_DCMI_STATE_READY             = 0x01U,  /*!< DCMI initialized and ready for use    */
	HAL_DCMI_STATE_BUSY              = 0x02U,  /*!< DCMI internal processing is ongoing   */
	HAL_DCMI_STATE_TIMEOUT           = 0x03U,  /*!< DCMI timeout state                    */
	HAL_DCMI_STATE_ERROR             = 0x04U,  /*!< DCMI error state                      */
	HAL_DCMI_STATE_SUSPENDED         = 0x05U   /*!< DCMI suspend state                    */
}HAL_DCMI_StateTypeDef;

typedef struct
{
	DCMI_TypeDef                  *Instance;           /*!< DCMI Register base address   */
	DCMI_InitTypeDef              Init;                /*!< DCMI parameters              */
	HAL_LockTypeDef               Lock;                /*!< DCMI locking object          */
	__IO HAL_DCMI_StateTypeDef    State;               /*!< DCMI state                   */
	__IO uint32_t                 XferCount;           /*!< DMA transfer counter         */
	__IO uint32_t                 XferSize;            /*!< DMA transfer size            */
	uint32_t                      XferTransferNumber;  /*!< DMA transfer number          */
	uint32_t                      pBuffPtr;            /*!< Pointer to DMA output buffer */
	DMA_HandleTypeDef             *DMA_Handle;         /*!< Pointer to the DMA handler   */
	__IO uint32_t                 ErrorCode;           /*!< DCMI Error code              */
}DCMI_HandleTypeDef;

typedef struct
{
	uint32_t SYSCLKSource;          /*!< The clock source (SYSCLKS) used as system clock.
                                       This parameter can be a value of @ref System_Source_Clock_Define    */

	uint32_t SYSCLKDIV;         	/*!< The system clock divider. This clock is derived from the system clock (SYSCLK).
                                       This parameter can be 0x00 to 0x1F       */
}RCC_SysclkInitTypeDef;

/**
  * @brief  RCC Internal/External Oscillator (HSE, HSI, LSE and LSI) configuration structure definition
  */
typedef struct
{
	uint32_t ClockSourceType;			/*!< The clock to be configured.
											 This parameter can be a value of @ref TMC_RCC_clocksource_type	*/
	FunctionalState HSEState;			/*!< The new state of the HSE. 										*/
	FunctionalState LSEState;			/*!< The new state of the LSE.										*/
	FunctionalState HSIState;			/*!< The new state of the HSI.										*/
	FunctionalState LSIState;			/*!< The new state of the LSI.										*/
	FunctionalState PLLState;			/*!< The new state of the PLL.										*/
	RCC_HSEConfigTypeDef HSEConfig;		/*!< HSE configure structure parameters.							*/
	RCC_LSEConfigTypeDef LSEConfig;		/*!< LSE configure structure parameters.							*/	
	RCC_PLL_InitTypeDef PLLConfig;		/*!< PLL configure structure parameters.						    */	
}RCC_OscInitTypeDef;

typedef enum
{
	DCMI_640_480, 
	DCMI_320_240, 
	DCMI_160_240,
}ImageSizeType;

void DCMI_DMA_LLI_Init(uint32_t bufaddr, ImageSizeType dcmi_size);
uint8_t DCMI_CaptureOnePic(uint32_t bufaddr, ImageSizeType dcmi_size);
int DCMI_Differ(uint32_t dcmi_size);
void AppCameraInit(void);
void TMC_DCMI_MspInit(DCMI_HandleTypeDef *hdcmi);
TMC_StatusTypeDef TMC_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct);
TMC_StatusTypeDef TMC_RCC_SystemClockConfig(RCC_SysclkInitTypeDef *RCC_SysclkInitStruct);
TMC_StatusTypeDef TMC_DMA_Init(DMA_HandleTypeDef *hdma);
TMC_StatusTypeDef TMC_DMA_DeInit(DMA_HandleTypeDef *hdma);
TMC_StatusTypeDef TMC_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
TMC_StatusTypeDef TMC_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
TMC_StatusTypeDef TMC_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t Timeout);
void TMC_DMA_IRQHandler(DMA_HandleTypeDef *hdma); 

void Sleep_Mode(void);

#ifdef __cplusplus					
}
#endif

#endif