/** ****************************************************************************** * @file UART.c * @author TMC Terminal Team * @version V1.0.0 * @date 06/01/2018 * @brief This file provides all the UART firmware functions. ****************************************************************************** * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, TMC SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2016 TMC

******************************************************************************/ /* Includes ------------------------------------------------------------------*/ #include "UART.h" #include "RCC.h" /** @addtogroup THM36x2 * @{ */ /** @addtogroup THM36x2_HAL_Driver * @{ */ /** @defgroup UART UART * @brief UART HAL modules driver * @{ */ /** @defgroup UART_Private_Defines UART Private Defines * @{ */ /* ---------------------- UART registers bit mask ------------------------ */ /* UARTCON1 register bit mask */ /* UARTCON2 register bit mask */ #define UART_BIT_WIDTH_Pos (0U) #define UART_BIT_WIDTH_Msk (0x1UL << UART_BIT_WIDTH_Pos) #define UART_BIT_WIDTH UART_BIT_WIDTH_Msk #define UART_PARITY_SET_Pos (1U) #define UART_PARITY_SET_Msk (0x3UL << UART_PARITY_SET_Pos) #define UART_PARITY_SET UART_PARITY_SET_Msk #define UART_BAUD_HIGH_Pos (3U) #define UART_BAUD_HIGH_Msk (0x1FUL << UART_BAUD_HIGH_Pos) #define UART_BAUD_HIGH UART_BAUD_HIGH_Msk /* UARTSTS register bit mask */ #define UART_STS_TXE_Pos (0U) #define UART_STS_TXE_Msk (0x1U << UART_STS_TXE_Pos) /*!< 0x00000001 */ #define UART_STS_TXE UART_STS_TXE_Msk /*!DataWidth)); //assert_param(IS_UART_PARITYSTATE(UART_InitStruct->ParityEn)); assert_param(IS_UART_PARITYMODE(UART_InitStruct->ParityMode)); uart_clock = RCC_GetSysClocksFreq() / 2; /* Write to UART CON */ BaudRate = uart_clock / (UART_InitStruct->BaudRate * 16.0) - 1; UARTx->CON1 = 0xFF & (uint16_t)BaudRate; /*Clear parity bits */ UARTx->CON2 &= ~UART_PARITY_SET; /*set baudrate high bits, parity mode bits and data width */ UARTx->CON2 = (((uint16_t)BaudRate >> 5) & UART_BAUD_HIGH) | UART_InitStruct->DataWidth | UART_InitStruct->ParityMode; UARTx->CON3 = (uint8_t)((BaudRate - (uint16_t)BaudRate) * 8 + 0.5); } /** * @brief Initializes the InitStruct of UARTx * @param[in] UART_InitStruct: pointer to a UART_InitTypeDef structure,which will be initialized. * @retval none * @note */ __weak void UART_StructInit(UART_InitTypeDef *UART_InitStruct) { UART_InitStruct->BaudRate = 115200; UART_InitStruct->DataWidth = UART_DATA_WIDTH_8; UART_InitStruct->ParityMode = UART_PARITY_MODE_NONE; } /** * @brief Read UART status * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral * @param[in] Uart_Flag: specifies the UART status. * @arg UART_FLAG_TXE: Transmit Buffer Empty * @arg UART_FLAG_RXF: Receive Buffer Full * @arg UART_FLAG_PE: Parity Error * @arg UART_FLAG_OF: Overflow Error * @arg UART_FLAG_FE: Frame Error * @retval FlagStatus * @arg SET : Flag Stutas is Set * @arg RESET : Flag Stutas is Reset * @note none */ FlagStatus UART_GetFlagStatus(UART_TypeDef *UARTx, uint16_t Uart_Flag) { assert_param(IS_UART_Periph((u32)UARTx)); assert_param(IS_UART_STATUS(Uart_Flag)); if((UARTx->STS & Uart_Flag) != RESET) { return SET; } return RESET; } /** * @brief Clear UART Flag status * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral. * @param[in] Uart_Flag: specifies the UART status. * @arg UART_FLAG_TXE: Transmit Buffer Empty * @arg UART_FLAG_RXF: Receive Buffer Full * @arg UART_FLAG_PE: Parity Error * @arg UART_FLAG_OF: Overflow Error * @arg UART_FLAG_FE: Frame Error * @retval none * @note none */ void UART_ClearFlagStatus(UART_TypeDef *UARTx, uint16_t Uart_Flag) { assert_param(IS_UART_Periph((u32)UARTx)); //read rxdata to clear flags; UARTx->RxDATA; } /** * @brief Enable or disable UART interrupt * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral. * @param[in] Uart_IT: specifies the UART interrupt status. * @arg UART_IT_TXE: Transmit Buffer Empty * @arg UART_IT_RXF: Receive Buffer Full * @arg UART_IT_PE: Parity Error * @arg UART_IT_OF: Overflow Error * @arg UART_IT_FE: Frame Error * @param[in] NewState * @arg DISABLE :Disable interrupt * @arg ENABLE :Enable interrupt * @retval none * @note none */ void UART_ITConfig(UART_TypeDef *UARTx, uint16_t Uart_IT, FunctionalState NewState) { assert_param(IS_UART_Periph((u32)UARTx)); assert_param(IS_UART_STATUS(Uart_IT)); if(NewState != DISABLE) { UARTx->MSK &= ~Uart_IT; } else { UARTx->MSK |= Uart_IT; } } /** * @brief Read UART interrupt status * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral * @param[in] Uart_IT: specifies the UART interrupt status. * @arg UART_IT_TXE: Transmit Buffer Empty * @arg UART_IT_RXF: Receive Buffer Full * @arg UART_IT_PE: Parity Error * @arg UART_IT_OF: Overflow Error * @arg UART_IT_FE: Frame Error * @retval FlagStatus * @arg SET : IT Stutas is Set * @arg RESET : IT Stutas is Reset * @note none */ FlagStatus UART_GetITStatus(UART_TypeDef *UARTx, uint16_t Uart_IT) { assert_param(IS_UART_Periph((u32)UARTx)); assert_param(IS_UART_STATUS(Uart_IT)); if(((UARTx->STS & Uart_IT) != RESET) && ((UARTx->MSK & Uart_IT) == RESET)) { return SET; } return RESET; } /** * @brief Clear UART IT status * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral. * @param[in] Uart_IT: specifies the UART interrupt status. * @arg UART_IT_TXE: Transmit Buffer Empty * @arg UART_IT_RXF: Receive Buffer Full * @arg UART_IT_PE: Parity Error * @arg UART_IT_OF: Overflow Error * @arg UART_IT_FE: Frame Error * @retval none * @note none */ void UART_ClearITStatus(UART_TypeDef *UARTx, uint16_t Uart_IT) { assert_param(IS_UART_Periph((u32)UARTx)); //read rxdata to clear flags; UARTx->RxDATA; } /** * @brief Enable or disable DMA * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral. * @param[in] DMA_Mode: specifies receive or transmit. * @arg UART_DMA_RX * @arg UART_DMA_TX * @param[in] NewState: new state of the UART DMA. * This parameter can be: ENABLE or DISABLE. * @retval none * @note none */ void UART_DMACmd(UART_TypeDef *UARTx, uint32_t DMA_Mode, FunctionalState NewState) { assert_param(IS_UART_Periph((u32)UARTx)); assert_param(IS_UART_DAM_MODE(DMA_Mode)); if(NewState != DISABLE) { UARTx->DMACON |= DMA_Mode; } else { UARTx->DMACON &= ~DMA_Mode; } } /** * @brief Get DMA status * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral. * @param[in] DMA_Mode: specifies receive or transmit. * @arg UART_DMA_RX * @arg UART_DMA_TX * @retval FlagStatus * @arg SET : DMA has been enabled * @arg RESET : DMA has been closed * @note none */ FlagStatus UART_GetDMAStatus(UART_TypeDef *UARTx, uint32_t DMA_Mode) { assert_param(IS_UART_Periph((u32)UARTx)); assert_param(IS_UART_DAM_MODE(DMA_Mode)); if(UARTx->DMACON & DMA_Mode) { return SET; } else { return RESET; } } /** * @brief Transmits single data through the UARTx peripheral. * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral. * @param[in] Data: the data to transmit. * @retval None */ void UART_SendData(UART_TypeDef *UARTx, uint8_t Data) { /* Check the parameters */ assert_param(IS_UART_Periph((u32)UARTx)); /* Transmit Data */ UARTx->TxDATA = Data; } /** * @brief Returns the most recent received data by the UARTx peripheral. * @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral. * @retval The received data. */ uint8_t UART_ReceiveData(UART_TypeDef *UARTx) { /* Check the parameters */ assert_param(IS_UART_Periph((u32)UARTx)); /* Receive Data */ return (uint8_t)UARTx->RxDATA; } /** * @} */ /** * @} */ /** * @} */ /** * @} */ /************************ (C) COPYRIGHT TMC *****END OF FILE****/