404 lines
13 KiB
C
404 lines
13 KiB
C
/**
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******************************************************************************
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* @file UART.c
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* @author TMC Terminal Team
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* @version V1.0.0
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* @date 06/01/2018
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* @brief This file provides all the UART firmware functions.
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******************************************************************************
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, TMC SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2016 TMC</center></h2>
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******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "UART.h"
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#include "RCC.h"
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/** @addtogroup THM36x2
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* @{
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*/
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/** @addtogroup THM36x2_HAL_Driver
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* @{
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*/
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/** @defgroup UART UART
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* @brief UART HAL modules driver
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* @{
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*/
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/** @defgroup UART_Private_Defines UART Private Defines
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* @{
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*/
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/* ---------------------- UART registers bit mask ------------------------ */
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/* UARTCON1 register bit mask */
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/* UARTCON2 register bit mask */
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#define UART_BIT_WIDTH_Pos (0U)
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#define UART_BIT_WIDTH_Msk (0x1UL << UART_BIT_WIDTH_Pos)
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#define UART_BIT_WIDTH UART_BIT_WIDTH_Msk
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#define UART_PARITY_SET_Pos (1U)
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#define UART_PARITY_SET_Msk (0x3UL << UART_PARITY_SET_Pos)
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#define UART_PARITY_SET UART_PARITY_SET_Msk
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#define UART_BAUD_HIGH_Pos (3U)
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#define UART_BAUD_HIGH_Msk (0x1FUL << UART_BAUD_HIGH_Pos)
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#define UART_BAUD_HIGH UART_BAUD_HIGH_Msk
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/* UARTSTS register bit mask */
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#define UART_STS_TXE_Pos (0U)
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#define UART_STS_TXE_Msk (0x1U << UART_STS_TXE_Pos) /*!< 0x00000001 */
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#define UART_STS_TXE UART_STS_TXE_Msk /*!<Transmit Data Register Empty*/
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#define UART_STS_RXF_Pos (1U)
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#define UART_STS_RXF_Msk (0x1U << UART_STS_RXF_Pos) /*!< 0x00000002 */
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#define UART_STS_RXF UART_STS_RXF_Msk /*!<Receive Data Register Full */
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#define UART_STS_PE_Pos (2U)
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#define UART_STS_PE_Msk (0x1U << UART_STS_PE_Pos) /*!< 0x00000004 */
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#define UART_STS_PE UART_STS_PE_Msk /*!<Parity Error */
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#define UART_STS_OFE_Pos (3U)
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#define UART_STS_OFE_Msk (0x1U << UART_STS_OFE_Pos) /*!< 0x00000008 */
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#define UART_STS_OFE UART_STS_OFE_Msk /*!<Overflow Error */
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#define UART_STS_FE_Pos (4U)
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#define UART_STS_FE_Msk (0x1U << UART_STS_FE_Pos) /*!< 0x00000010 */
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#define UART_STS_FE UART_STS_FE_Msk /*!<Framing Error */
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/* UARTCON3 register bit mask */
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#define UART_BAUD_FRACTION_Pos (0U)
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#define UART_BAUD_FRACTION_Msk (0x7U << UART_BAUD_FRACTION_Pos) /*!< 0x00000007 */
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#define UART_BAUD_FRACTION UART_BAUD_FRACTION_Msk /*!<Baud Fraction Value */
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#define UART_BAUD_FRACTION_0000 0x00000000UL /*!<Baud Value Add 0.000 */
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#define UART_BAUD_FRACTION_0125 0x00000001UL /*!<Baud Value Add 0.125 */
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#define UART_BAUD_FRACTION_0250 0x00000002UL /*!<Baud Value Add 0.25 */
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#define UART_BAUD_FRACTION_0375 0x00000003UL /*!<Baud Value Add 0.375 */
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#define UART_BAUD_FRACTION_0500 0x00000004UL /*!<Baud Value Add 0.5 */
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#define UART_BAUD_FRACTION_0625 0x00000005UL /*!<Baud Value Add 0.625 */
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#define UART_BAUD_FRACTION_0750 0x00000006UL /*!<Baud Value Add 0.75 */
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#define UART_BAUD_FRACTION_0875 0x00000007UL /*!<Baud Value Add 0.875 */
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/* UARTMSK register bit mask */
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#define UART_INT_TXEMSK_Pos (0U)
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#define UART_INT_TXEMSK_Msk (0x1U << UART_INT_TXEMSK_Pos) /*!< 0x00000001 */
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#define UART_INT_TXEMSK UART_INT_TXEMSK_Msk /*!<Mask Transmit Data Register Empty Interrupt */
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#define UART_INT_RXFMSK_Pos (1U)
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#define UART_INT_RXFMSK_Msk (0x1U << UART_INT_RXFMSK_Pos) /*!< 0x00000002 */
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#define UART_INT_RXFMSK UART_INT_RXFMSK_Msk /*!<Mask Receive Data Register Full Interrupt */
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#define UART_INT_PEMSK_Pos (2U)
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#define UART_INT_PEMSK_Msk (0x1U << UART_INT_PEMSK_Pos) /*!< 0x00000004 */
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#define UART_INT_PEMSK UART_INT_PEMSK_Msk /*!<Mask Parity Error Interrupt */
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#define UART_INT_OFEMSK_Pos (3U)
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#define UART_INT_OFEMSK_Msk (0x1U << UART_INT_OFEMSK_Pos) /*!< 0x00000008 */
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#define UART_INT_OFEMSK UART_INT_OFEMSK_Msk /*!<Mask Overflow Error Interrupt */
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#define UART_INT_FEMSK_Pos (4U)
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#define UART_INT_FEMSK_Msk (0x1U << UART_INT_FEMSK_Pos) /*!< 0x00000010 */
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#define UART_INT_FEMSK UART_INT_FEMSK_Msk /*!<Mask Framing Error Interrupt */
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/* UARTDMACON register bit mask */
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#define UART_DMA_RXEN_Pos (0U)
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#define UART_DMA_RXEN_Msk (0x1U << UART_DMA_RXEN_Pos) /*!< 0x00000001 */
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#define UART_DMA_RXEN UART_DMA_RXEN_Msk /*!<Receive DMA Enable */
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#define UART_DMA_TXEN_Pos (1U)
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#define UART_DMA_TXEN_Msk (0x1U << UART_DMA_TXEN_Pos) /*!< 0x00000002 */
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#define UART_DMA_TXEN UART_DMA_TXEN_Msk /*!<Transmit DMA Enable */
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/**
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* @brief Deinitializes the UARTx peripheral registers to their reset values.
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* @param[in] UARTx: where x can be 1 to 3 to select the UART peripheral.
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* @retval none
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* @note
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*/
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void UART_DeInit(UART_TypeDef *UARTx)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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if(UARTx == UART1)
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{
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RCC_APB2PeriphSoftReset(RCC_APB2Periph_UART1);
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while(RCC_APB2PeriphGetResetFlag(RCC_APB2Periph_UART1) == RESET);
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}
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else if(UARTx == UART2)
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{
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RCC_APB3PeriphSoftReset(RCC_APB3Periph_UART2);
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while(RCC_APB3PeriphGetResetFlag(RCC_APB3Periph_UART2) == RESET);
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}
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else if(UARTx == UART3)
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{
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RCC_APB2PeriphSoftReset(RCC_APB2Periph_UART3);
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while(RCC_APB2PeriphGetResetFlag(RCC_APB2Periph_UART3) == RESET);
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}
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else if(UARTx == UART4)
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{
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RCC_APB3PeriphSoftReset(RCC_APB3Periph_UART4);
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while(RCC_APB3PeriphGetResetFlag(RCC_APB3Periph_UART4) == RESET);
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}
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}
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/**
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* @brief Initializes the UARTx peripheral according to the specified
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral
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* @param[in] USART_InitStruct: pointer to a USART_InitTypeDef structure
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* that contains the configuration information for the specified USART peripheral.
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* @retval none
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* @note
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*/
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void UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef *UART_InitStruct)
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{
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float BaudRate;
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uint32_t uart_clock = 0;
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/* Check the parameters */
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assert_param(IS_UART_Periph((u32)UARTx));
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assert_param(IS_UART_DATAWIDTH(UART_InitStruct->DataWidth));
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//assert_param(IS_UART_PARITYSTATE(UART_InitStruct->ParityEn));
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assert_param(IS_UART_PARITYMODE(UART_InitStruct->ParityMode));
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uart_clock = RCC_GetSysClocksFreq() / 2;
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/* Write to UART CON */
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BaudRate = uart_clock / (UART_InitStruct->BaudRate * 16.0) - 1;
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UARTx->CON1 = 0xFF & (uint16_t)BaudRate;
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/*Clear parity bits */
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UARTx->CON2 &= ~UART_PARITY_SET;
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/*set baudrate high bits, parity mode bits and data width */
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UARTx->CON2 = (((uint16_t)BaudRate >> 5) & UART_BAUD_HIGH)
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| UART_InitStruct->DataWidth
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| UART_InitStruct->ParityMode;
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UARTx->CON3 = (uint8_t)((BaudRate - (uint16_t)BaudRate) * 8 + 0.5);
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}
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/**
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* @brief Initializes the InitStruct of UARTx
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* @param[in] UART_InitStruct: pointer to a UART_InitTypeDef structure,which will be initialized.
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* @retval none
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* @note
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*/
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__weak void UART_StructInit(UART_InitTypeDef *UART_InitStruct)
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{
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UART_InitStruct->BaudRate = 115200;
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UART_InitStruct->DataWidth = UART_DATA_WIDTH_8;
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UART_InitStruct->ParityMode = UART_PARITY_MODE_NONE;
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}
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/**
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* @brief Read UART status
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral
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* @param[in] Uart_Flag: specifies the UART status.
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* @arg UART_FLAG_TXE: Transmit Buffer Empty
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* @arg UART_FLAG_RXF: Receive Buffer Full
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* @arg UART_FLAG_PE: Parity Error
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* @arg UART_FLAG_OF: Overflow Error
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* @arg UART_FLAG_FE: Frame Error
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* @retval FlagStatus
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* @arg SET : Flag Stutas is Set
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* @arg RESET : Flag Stutas is Reset
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* @note none
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*/
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FlagStatus UART_GetFlagStatus(UART_TypeDef *UARTx, uint16_t Uart_Flag)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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assert_param(IS_UART_STATUS(Uart_Flag));
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if((UARTx->STS & Uart_Flag) != RESET)
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{
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return SET;
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}
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return RESET;
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}
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/**
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* @brief Clear UART Flag status
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral.
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* @param[in] Uart_Flag: specifies the UART status.
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* @arg UART_FLAG_TXE: Transmit Buffer Empty
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* @arg UART_FLAG_RXF: Receive Buffer Full
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* @arg UART_FLAG_PE: Parity Error
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* @arg UART_FLAG_OF: Overflow Error
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* @arg UART_FLAG_FE: Frame Error
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* @retval none
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* @note none
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*/
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void UART_ClearFlagStatus(UART_TypeDef *UARTx, uint16_t Uart_Flag)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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//read rxdata to clear flags;
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UARTx->RxDATA;
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}
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/**
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* @brief Enable or disable UART interrupt
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral.
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* @param[in] Uart_IT: specifies the UART interrupt status.
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* @arg UART_IT_TXE: Transmit Buffer Empty
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* @arg UART_IT_RXF: Receive Buffer Full
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* @arg UART_IT_PE: Parity Error
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* @arg UART_IT_OF: Overflow Error
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* @arg UART_IT_FE: Frame Error
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* @param[in] NewState
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* @arg DISABLE :Disable interrupt
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* @arg ENABLE :Enable interrupt
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* @retval none
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* @note none
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*/
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void UART_ITConfig(UART_TypeDef *UARTx, uint16_t Uart_IT, FunctionalState NewState)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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assert_param(IS_UART_STATUS(Uart_IT));
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if(NewState != DISABLE)
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{
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UARTx->MSK &= ~Uart_IT;
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}
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else
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{
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UARTx->MSK |= Uart_IT;
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}
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}
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/**
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* @brief Read UART interrupt status
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral
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* @param[in] Uart_IT: specifies the UART interrupt status.
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* @arg UART_IT_TXE: Transmit Buffer Empty
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* @arg UART_IT_RXF: Receive Buffer Full
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* @arg UART_IT_PE: Parity Error
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* @arg UART_IT_OF: Overflow Error
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* @arg UART_IT_FE: Frame Error
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* @retval FlagStatus
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* @arg SET : IT Stutas is Set
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* @arg RESET : IT Stutas is Reset
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* @note none
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*/
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FlagStatus UART_GetITStatus(UART_TypeDef *UARTx, uint16_t Uart_IT)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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assert_param(IS_UART_STATUS(Uart_IT));
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if(((UARTx->STS & Uart_IT) != RESET) && ((UARTx->MSK & Uart_IT) == RESET))
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{
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return SET;
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}
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return RESET;
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}
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/**
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* @brief Clear UART IT status
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral.
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* @param[in] Uart_IT: specifies the UART interrupt status.
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* @arg UART_IT_TXE: Transmit Buffer Empty
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* @arg UART_IT_RXF: Receive Buffer Full
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* @arg UART_IT_PE: Parity Error
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* @arg UART_IT_OF: Overflow Error
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* @arg UART_IT_FE: Frame Error
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* @retval none
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* @note none
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*/
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void UART_ClearITStatus(UART_TypeDef *UARTx, uint16_t Uart_IT)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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//read rxdata to clear flags;
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UARTx->RxDATA;
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}
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/**
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* @brief Enable or disable DMA
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral.
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* @param[in] DMA_Mode: specifies receive or transmit.
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* @arg UART_DMA_RX
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* @arg UART_DMA_TX
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* @param[in] NewState: new state of the UART DMA.
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* This parameter can be: ENABLE or DISABLE.
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* @retval none
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* @note none
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*/
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void UART_DMACmd(UART_TypeDef *UARTx, uint32_t DMA_Mode, FunctionalState NewState)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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assert_param(IS_UART_DAM_MODE(DMA_Mode));
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if(NewState != DISABLE)
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{
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UARTx->DMACON |= DMA_Mode;
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}
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else
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{
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UARTx->DMACON &= ~DMA_Mode;
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}
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}
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/**
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* @brief Get DMA status
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral.
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* @param[in] DMA_Mode: specifies receive or transmit.
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* @arg UART_DMA_RX
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* @arg UART_DMA_TX
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* @retval FlagStatus
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* @arg SET : DMA has been enabled
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* @arg RESET : DMA has been closed
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* @note none
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*/
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FlagStatus UART_GetDMAStatus(UART_TypeDef *UARTx, uint32_t DMA_Mode)
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{
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assert_param(IS_UART_Periph((u32)UARTx));
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assert_param(IS_UART_DAM_MODE(DMA_Mode));
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if(UARTx->DMACON & DMA_Mode)
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{
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return SET;
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}
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else
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{
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return RESET;
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}
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}
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/**
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* @brief Transmits single data through the UARTx peripheral.
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral.
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* @param[in] Data: the data to transmit.
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* @retval None
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*/
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void UART_SendData(UART_TypeDef *UARTx, uint8_t Data)
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{
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/* Check the parameters */
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assert_param(IS_UART_Periph((u32)UARTx));
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/* Transmit Data */
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UARTx->TxDATA = Data;
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}
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/**
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* @brief Returns the most recent received data by the UARTx peripheral.
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* @param[in] UARTx: where x can be 1 to 4 to select the UART peripheral.
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* @retval The received data.
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*/
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uint8_t UART_ReceiveData(UART_TypeDef *UARTx)
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{
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/* Check the parameters */
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assert_param(IS_UART_Periph((u32)UARTx));
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/* Receive Data */
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return (uint8_t)UARTx->RxDATA;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT TMC *****END OF FILE****/
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