linuxOS_AP05/kernel/arch/arm64/boot/dts/rockchip/lcd-mipi6.86-TXW.dtsi
2025-06-02 13:59:07 +08:00

137 lines
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Executable File

/*
* Copyright (C) 2023 walter, Inc.
* arch/arm64/boot/dts/lcd-mipi6.86-TXW.dtsi
* Single Chip Driver: ICNL9707
* resolution: 480*1280
* mipi channel: 4
*/
&dsi {
status = "okay";
//status = "disabled";
//rockchip,lane-rate = <800>;
panel@0 {
compatible = "sitronix,st7703", "simple-panel-dsi";
reg = <0>;
backlight = <&backlight>;
prepare-delay-ms = <2>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
disable-delay-ms = <50>;
unprepare-delay-ms = <20>;
width-mm = <66>;
height-mm = <160>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 B9 F1 12 83
39 00 04 B2 C8 14 30
39 00 0B B3 10 10 28 28 03 FF 00 00 00 00
15 00 02 B4 80
39 00 03 B5 0A 0A
39 00 03 B6 97 97
39 00 05 B8 26 22 F0 63
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00
00 00 00 00 00 44 25 00 90 0A
00 00 01 4F 01 00 00 37
15 00 02 BC 46
39 00 04 BF 02 11 00
39 00 0A C0 73 73 50 50 00 00 12 70 00
39 00 0D C1 57 00 32 32 77 E1 FF FF CC CC 77 77
39 00 07 C6 82 00 BF FF 00 FF
15 00 02 CC 0B
39 00 23 E0 00 00 00 1B 25 3F 24 1C 05
0A 0C 0E 10 0E 11 11 17 00 00
00 1B 25 3F 24 1C 05 0A 0C 0E
10 0E 11 11 17
39 00 0F E3 03 03 03 03 00 03 00 00 00
00 FF 80 C0 10
39 00 40 E9 C8 10 07 05 02 80 81 12 31
23 4F 86 80 81 47 16 00 00 05
00 00 00 00 00 05 00 00 00 48
18 FA B3 17 58 88 88 88 88 88
48 08 FA B2 06 48 88 88 88 88
88 00 00 00 01 00 00 00 00 00
00 00 00 00
39 00 3E EA 96 12 01 01 02 96 00 00 00
00 00 00 4F 08 8A B4 60 28 88
88 88 88 88 4F 18 8A B5 71 38
88 88 88 88 88 23 00 00 00 8C
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 40 80 81 00 00
00 00
05 96 01 11
05 14 01 29
];
display-timings {
native-mode = <&timing1>;
timing1: timing1 {
clock-frequency = <72000000>;
hactive = <600>;
vactive = <1280>;
hfront-porch = <110>;
hsync-len = <92>;
hback-porch = <110>;
vfront-porch = <13>;
vsync-len = <6>;
vback-porch = <13>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
swap-rb=<0>;
swap-rg=<0>;
swap-gb=<0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi_in_vopb {
status = "okay";
};
&dsi_in_vopl {
status = "disabled";
};
&route_dsi {
connect = <&vopb_out_dsi>;
status = "okay";
//status = "disabled";
};