// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2024 Rockchip Electronics Co., Ltd. */ /dts-v1/; #include "rv1106b.dtsi" #include "rv1106b-evb.dtsi" #include "rv1106b-thunder-boot-cam.dtsi" #include "rv1106b-thunder-boot-spi-nor.dtsi" / { model = "Rockchip RV1106B EVB3 V10 Board"; compatible = "rockchip,rv1106b-evb3-v10", "rockchip,rv1106b"; chosen { bootargs = "loglevel=0 earlycon=uart8250,mmio32,0x20540000 console=ttyFIQ0 root=/dev/rd0 rootfstype=erofs rootflags=dax snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=32K"; }; sdio_pwrseq: sdio-pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; pinctrl-0 = <&wifi_enable_h>; /* * On the module itself this is one of these (depending * on the actual card populated): * - SDIO_RESET_L_WL_REG_ON * - PDN (power down when low) */ post-power-on-delay-ms = <300>; reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_HIGH>; status = "disabled"; }; vcc_1v8: vcc-1v8 { compatible = "regulator-fixed"; regulator-name = "vcc_1v8"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vcc3v3_sd: vcc3v3-sd { compatible = "regulator-fixed"; gpio = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; regulator-name = "vcc3v3_sd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_pwren>; }; vdd_logic: vdd_arm_npu: vdd-arm-npu { compatible = "regulator-fixed"; regulator-name = "vdd_arm_npu"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <904000>; regulator-max-microvolt = <904000>; }; }; &acodec { pa-ctl-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; }; &cpu0 { cpu-supply = <&vdd_arm_npu>; }; &fspi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; }; }; &i2c4 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&i2c4m1_xfer_pins>; rockchip,amp-shared; status = "okay"; ps5458: ps5458@4c { compatible = "prime,ps5458"; reg = <0x4c>; clocks = <&cru CLK_MIPI0_OUT2IO>; clock-names = "xvclk"; reset-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&cam_clk0_pins>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "default"; rockchip,camera-module-lens-name = "default"; port { cam0_out: endpoint { remote-endpoint = <&csi_dphy_input0>; data-lanes = <1 2>; }; }; }; }; &npu { rknpu-supply = <&vdd_arm_npu>; }; &pinctrl { sdmmc { /omit-if-no-ref/ sdmmc_pwren: sdmmc-pwren { rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; }; }; sdio-pwrseq { /omit-if-no-ref/ wifi_enable_h: wifi-enable-h { rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; &rkisp_thunderboot { /* * vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num) * e.g. 2688x1520: 0x14c8000 */ reg = <0x00860000 0x14c8000>; }; &ramdisk_r { reg = <0x01d28000 (10 * 0x00100000)>; }; &ramdisk_c { reg = <0x02728000 (4 * 0x00100000)>; }; &rkisp_vir1 { status = "okay"; }; &rockchip_suspend { status = "okay"; rockchip,sleep-mode-config = < (0 | RKPM_SLP_ARMOFF_LOGOFF | RKPM_SLP_PMU_PMUALIVE_32K | RKPM_SLP_PMU_DIS_OSC | RKPM_SLP_LP_PR ) >; }; &rtc { rockchip,rtc-suspend-bypass; status = "okay"; }; &saradc { vref-supply = <&vcc_1v8>; status = "okay"; }; &sdmmc0 { bus-width = <1>; cap-mmc-highspeed; cap-sd-highspeed; disable-wp; no-sdio; no-mmc; pinctrl-names = "normal", "idle"; pinctrl-0 = <&sdmmc0_det_pins &sdmmc0_clk_pins &sdmmc0_cmd_pins &sdmmc0_bus1_pins>; pinctrl-1 = <&sdmmc0_det_pins &sdmmc0_clk_idle_pins &sdmmc0_cmd_idle_pins &sdmmc0_bus1_idle_pins>; vmmc-supply = <&vcc3v3_sd>; status = "okay"; }; &sdmmc1 { bus-width = <1>; cap-sd-highspeed; cap-sdio-irq; keep-power-in-suspend; //mmc-pwrseq = <&sdio_pwrseq>; non-removable; no-sd; no-mmc; pinctrl-names = "default"; pinctrl-0 = <&sdmmc1_clk_pins &sdmmc1_cmd_pins &sdmmc1_bus1_pins>; status = "okay"; };