119 lines
2.5 KiB
Plaintext
119 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*/
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/ {
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pwm_rockchip_test: pwm-rockchip-test {
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compatible = "pwm-rockchip-test";
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pwms = <&pwm0_4ch_0 0 25000 0>,
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<&pwm0_4ch_1 0 25000 0>,
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<&pwm0_4ch_2 0 25000 0>,
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<&pwm0_4ch_3 0 25000 0>,
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<&pwm1_4ch_0 0 25000 0>,
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<&pwm1_4ch_1 0 25000 0>,
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<&pwm1_4ch_2 0 25000 0>,
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<&pwm1_4ch_3 0 25000 0>,
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<&pwm2_4ch_0 0 25000 0>,
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<&pwm2_4ch_1 0 25000 0>,
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<&pwm2_4ch_2 0 25000 0>,
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<&pwm2_4ch_3 0 25000 0>;
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pwm-names = "pwm0_0",
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"pwm0_1",
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"pwm0_2",
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"pwm0_3",
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"pwm1_0",
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"pwm1_1",
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"pwm1_2",
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"pwm1_3",
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"pwm2_0",
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"pwm2_1",
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"pwm2_2",
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"pwm2_3";
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};
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};
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&pwm0_4ch_0 {
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status = "okay";
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pinctrl-0 = <&pwm0m1_ch0_pins>;
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assigned-clocks = <&cru CLK_PWM0>;
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assigned-clock-rates = <100000000>;
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};
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&pwm0_4ch_1 {
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status = "okay";
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pinctrl-0 = <&pwm0m1_ch1_pins>;
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assigned-clocks = <&cru CLK_PWM0>;
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assigned-clock-rates = <100000000>;
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};
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&pwm0_4ch_2 {
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status = "okay";
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pinctrl-0 = <&pwm0m1_ch2_pins>;
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assigned-clocks = <&cru CLK_PWM0>;
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assigned-clock-rates = <100000000>;
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};
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&pwm0_4ch_3 {
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status = "okay";
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pinctrl-0 = <&pwm0m1_ch3_pins>;
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assigned-clocks = <&cru CLK_PWM0>;
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assigned-clock-rates = <100000000>;
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};
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&pwm1_4ch_0 {
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status = "okay";
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pinctrl-0 = <&pwm1m1_ch0_pins>;
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assigned-clocks = <&cru CLK_PWM1>;
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assigned-clock-rates = <100000000>;
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};
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&pwm1_4ch_1 {
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status = "okay";
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pinctrl-0 = <&pwm1m1_ch1_pins>;
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assigned-clocks = <&cru CLK_PWM1>;
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assigned-clock-rates = <100000000>;
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};
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&pwm1_4ch_2 {
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status = "okay";
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pinctrl-0 = <&pwm1m1_ch2_pins>;
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assigned-clocks = <&cru CLK_PWM1>;
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assigned-clock-rates = <100000000>;
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};
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&pwm1_4ch_3 {
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status = "okay";
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pinctrl-0 = <&pwm1m1_ch3_pins>;
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assigned-clocks = <&cru CLK_PWM1>;
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assigned-clock-rates = <100000000>;
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};
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&pwm2_4ch_0 {
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status = "okay";
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pinctrl-0 = <&pwm2m1_ch0_pins>;
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assigned-clocks = <&cru CLK_PWM2>;
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assigned-clock-rates = <100000000>;
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};
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&pwm2_4ch_1 {
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status = "okay";
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pinctrl-0 = <&pwm2m1_ch1_pins>;
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assigned-clocks = <&cru CLK_PWM2>;
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assigned-clock-rates = <100000000>;
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};
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&pwm2_4ch_2 {
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status = "okay";
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pinctrl-0 = <&pwm2m1_ch2_pins>;
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assigned-clocks = <&cru CLK_PWM2>;
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assigned-clock-rates = <100000000>;
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};
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&pwm2_4ch_3 {
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status = "okay";
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pinctrl-0 = <&pwm2m1_ch3_pins>;
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assigned-clocks = <&cru CLK_PWM2>;
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assigned-clock-rates = <100000000>;
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};
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