116 lines
2.3 KiB
Plaintext
116 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1103b.dtsi"
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#include "rv1106b-evb2-v10.dtsi"
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#include "rv1106b-thunder-boot-cam.dtsi"
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#include "rv1106b-thunder-boot-spi-nor.dtsi"
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/ {
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model = "Rockchip RV1106B EVB2 V10 Board for 4K Unite";
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compatible = "rockchip,rv1106b-evb2-v10-4k", "rockchip,rv1106b";
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chosen {
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bootargs = "loglevel=0 earlycon=uart8250,mmio32,0x20540000 console=ttyFIQ0 root=/dev/rd0 rootfstype=erofs rootflags=dax snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=32K";
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};
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};
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&fspi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <100000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cam0_out>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&i2c4 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m1_xfer_pins>;
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rockchip,amp-shared;
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status = "okay";
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sc850sl: sc850sl@30 {
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compatible = "smartsens,sc850sl";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru CLK_MIPI0_OUT2IO>;
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clock-names = "xvclk";
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reset-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam_clk0_pins>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "default";
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rockchip,camera-module-lens-name = "default";
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port {
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cam0_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&rkisp {
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rockchip,unite-en;
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};
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&rkisp_thunderboot {
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/* reg's offset MUST match with RTOS */
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/*
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* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
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* e.g. 3840x2160: 0x1e0f000 (3 buffs)
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*/
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reg = <0x00860000 0x1e0f000>;
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};
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&ramdisk_r {
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reg = <0x266f000 (12 * 0x00100000)>;
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};
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&ramdisk_c {
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reg = <0x326f000 (5 * 0x00100000)>;
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};
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