46 lines
1.8 KiB
C
46 lines
1.8 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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#ifndef __ROCKCHIP_HPTIEMR_H__
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#define __ROCKCHIP_HPTIEMR_H__
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enum rk_hptimer_mode_t {
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RK_HPTIMER_NORM_MODE = 0,
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RK_HPTIMER_HARD_ADJUST_MODE = 1,
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RK_HPTIMER_SOFT_ADJUST_MODE = 2,
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};
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/* hptimer int */
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enum rk_hptimer_v2_int_id_t {
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RK_HPTIMER_V2_INT_REACH = 0,
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RK_HPTIMER_V2_INT_SYNC = 2,
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RK_HPTIMER_V2_INT_32K_REACH = 3,
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RK_HPTIMER_V2_INT_EXTRA_REACH = 4,
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};
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int rk_hptimer_is_enabled(void __iomem *base);
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int rk_hptimer_get_mode(void __iomem *base);
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u64 rk_hptimer_get_count(void __iomem *base);
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int rk_hptimer_wait_mode(void __iomem *base, enum rk_hptimer_mode_t mode);
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void rk_hptimer_do_soft_adjust(void __iomem *base, u32 hf, u32 lf);
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void rk_hptimer_do_soft_adjust_no_wait(void __iomem *base, u32 hf, u32 lf);
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void rk_hptimer_mode_init(void __iomem *base, enum rk_hptimer_mode_t mode);
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void rk_hptimer_v2_clear_int_st(void __iomem *base, enum rk_hptimer_v2_int_id_t id);
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void rk_hptimer_v2_enable_int(void __iomem *base, enum rk_hptimer_v2_int_id_t id);
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void rk_hptimer_v2_disable_int(void __iomem *base, enum rk_hptimer_v2_int_id_t id);
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int rk_hptimer_v2_wait_sync(void __iomem *base);
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void rk_hptimer_v2_do_soft_adjust(void __iomem *base, u32 hf, u32 lf);
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void rk_hptimer_v2_do_soft_adjust_no_wait(void __iomem *base, u32 hf, u32 lf);
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void rk_hptimer_v2_do_hard_adjust(void __iomem *base);
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void rk_hptimer_v2_do_hard_adjust_no_wait(void __iomem *base);
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void rk_hptimer_v2_config_one_shot_timeout_int(void __iomem *base, u64 delta_cnt);
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void rk_hptimer_v2_config_free_timeout_int(void __iomem *base, u32 delta_cnt);
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void rk_hptimer_v2_config_sleep_timeout_int(void __iomem *base, u64 delta_cnt);
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void rk_hptimer_v2_mode_init(void __iomem *base, enum rk_hptimer_mode_t mode, u32 hf);
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#endif
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