111 lines
3.5 KiB
C
Executable File
111 lines
3.5 KiB
C
Executable File
/*
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* Copyright (c) 2022, Fuzhou Rockchip Electronics Co., Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef RK960_HWIO_H_INCLUDED
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#define RK960_HWIO_H_INCLUDED
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#include <linux/module.h>
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#include <net/mac80211.h>
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#include <linux/time.h>
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#include <linux/pm.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/syscalls.h>
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#include <linux/fs.h>
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#include <asm/uaccess.h>
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#include <linux/rfkill-wlan.h>
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#include <linux/sched.h>
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#include <linux/kthread.h>
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#include <linux/workqueue.h>
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#include <linux/platform_device.h>
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#include <linux/suspend.h>
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#include <linux/of.h>
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/delay.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/mmc.h>
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#include <linux/mmc/core.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sdio_func.h>
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#include <linux/mmc/sdio_ids.h>
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#include <linux/mmc/sdio.h>
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#include <linux/mmc/sd.h>
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/* ***************************************************************
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*Device register definitions
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*************************************************************** */
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/* 16/32 bits */
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#define ST90TDS_CONFIG_REG_ID (0x0000)
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/* 16/32 bits */
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#define ST90TDS_CONTROL_REG_ID (0x0001)
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/* 32 bits, t_settle/general */
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#define ST90TDS_TSET_GEN_R_W_REG_ID (0x0006)
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/* WBF - Control register bit set */
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/* next o/p length, bit 11 to 0 */
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#define ST90TDS_CONT_NEXT_LEN_MASK (0xFFFF)
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#define ST90TDS_CONT_WUP_BIT (BIT(12))
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#define ST90TDS_CONT_RDY_BIT (BIT(13))
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#define ST90TDS_CONT_IRQ_ENABLE (BIT(14))
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#define ST90TDS_CONT_RDY_ENABLE (BIT(15))
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#define ST90TDS_CONT_IRQ_RDY_ENABLE (BIT(14)|BIT(15))
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/* SPI Config register bit set */
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#define ST90TDS_CONFIG_FRAME_BIT (BIT(2))
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#define ST90TDS_CONFIG_WORD_MODE_BITS (BIT(3)|BIT(4))
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#define ST90TDS_CONFIG_WORD_MODE_1 (BIT(3))
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#define ST90TDS_CONFIG_WORD_MODE_2 (BIT(4))
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#define ST90TDS_CONFIG_ERROR_0_BIT (BIT(5))
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#define ST90TDS_CONFIG_ERROR_1_BIT (BIT(6))
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#define ST90TDS_CONFIG_ERROR_2_BIT (BIT(7))
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/* TBD: Sure??? */
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#define ST90TDS_CONFIG_CSN_FRAME_BIT (BIT(7))
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#define ST90TDS_CONFIG_ERROR_3_BIT (BIT(8))
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#define ST90TDS_CONFIG_ERROR_4_BIT (BIT(9))
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/* QueueM */
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#define ST90TDS_CONFIG_ACCESS_MODE_BIT (BIT(10))
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/* AHB bus */
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#define ST90TDS_CONFIG_AHB_PFETCH_BIT (BIT(11))
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#define ST90TDS_CONFIG_CPU_CLK_DIS_BIT (BIT(12))
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/* APB bus */
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#define ST90TDS_CONFIG_PFETCH_BIT (BIT(13))
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/* cpu reset */
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#define ST90TDS_CONFIG_CPU_RESET_BIT (BIT(14))
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#define ST90TDS_CONFIG_CLEAR_INT_BIT (BIT(15))
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/* For RK960 the IRQ Enable and Ready Bits are in CONFIG register */
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#define ST90TDS_CONF_IRQ_RDY_ENABLE (BIT(16)|BIT(17))
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#define dev_to_sdio_func(d) container_of(d, struct sdio_func, dev)
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/* extern */ struct rk960_common;
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int cw2000_sdio_readb(struct rk960_common *priv, u32 addr);
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int cw2000_sdio_writeb(struct rk960_common *priv, u32 addr, u8 val);
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int rk960_data_read(struct rk960_common *priv, void *buf, size_t buf_len);
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int rk960_data_write(struct rk960_common *priv,
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const void *buf, size_t buf_len);
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int rk960_reg_read(struct rk960_common *priv, u32 addr,
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void *buf, size_t buf_len);
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int rk960_reg_write(struct rk960_common *priv, u32 addr,
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const void *buf, size_t buf_len);
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int rk960_sdio_set_bus_width(struct rk960_common *priv, int width, int lock);
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int rk960_sdio_get_bus_width(struct rk960_common *priv);
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int rk960_get_sdio_width_param(void);
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#endif /* RK960_HWIO_H_INCLUDED */
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