70 lines
3.3 KiB
C
70 lines
3.3 KiB
C
/*
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* Copyright (C) 2021 Rockchip Electronics Co., Ltd.
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* Authors:
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* Cerf Yu <cerf.yu@rock-chips.com>
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _IM2D_SLT_CONFIG_H_
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#define _IM2D_SLT_CONFIG_H_
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/* im2d_slt config */
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#define IM2D_SLT_THREAD_EN 1 /* Enable multi-threaded mode. */
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#define IM2D_SLT_THREAD_MAX 10 /* Maximum number of threads. */
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#define IM2D_SLT_WHILE_EN 1 /* Enable while mode, 1: while, 0 single. */
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#define IM2D_SLT_WHILE_NUM 500 /* Number of while mode. */
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/* raster test */
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#define IM2D_SLT_TEST_RGA2_0_EN 1 /* Enable rga2_core0 case. */
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#define IM2D_SLT_TEST_RGA2_1_EN 0 /* Enable rga2_core1 case. */
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#define IM2D_SLT_TEST_RGA3_0_EN 0 /* Enable rga3_core0 case. */
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#define IM2D_SLT_TEST_RGA3_1_EN 0 /* Enable rga3_core1 case. */
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#define IM2D_SLT_TEST_SPECIAL_EN 1 /* Enable special test. */
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/* special test */
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#define IM2D_SLT_TEST_RGA2_0_TILE_EN 0 /* Enable rga2_core0 TILE4x4 case. */
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#define IM2D_SLT_TEST_RGA2_0_AFBC32x8_EN 0 /* Enable rga2_core0 AFBC32x8 split mode case. */
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#define IM2D_SLT_TEST_RGA2_0_RKFBC64x4_EN 0 /* Enable rga2_core0 AFBC32x8 split mode case. */
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#define IM2D_SLT_TEST_RGA2_1_TILE_EN 0 /* Enable rga2_core1 TILE4x4 case. */
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#define IM2D_SLT_TEST_RGA2_1_AFBC32x8_EN 0 /* Enable rga2_core0 AFBC32x8 split mode case. */
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#define IM2D_SLT_TEST_RGA2_1_RKFBC64x4_EN 0 /* Enable rga2_core0 AFBC32x8 split mode case. */
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#define IM2D_SLT_TEST_RGA3_0_FBC_EN 0 /* Enable rga3_core0 AFBC16x16 case. */
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#define IM2D_SLT_TEST_RGA3_1_FBC_EN 0 /* Enable rga3_core1 AFBC16x16 case. */
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#define IM2D_SLT_TEST_PERF_EN 1 /* Enable perf test. */
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#define IM2D_SLT_DEFAULT_WIDTH 1280 /* Default image width. */
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#define IM2D_SLT_DEFAULT_HEIGHT 720 /* Default image height. */
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#if IM2D_SLT_GRAPHICBUFFER_EN
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#define IM2D_SLT_DEFAULT_FORMAT HAL_PIXEL_FORMAT_RGBA_8888 /* Default image format. */
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#else
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#define IM2D_SLT_DEFAULT_FORMAT RK_FORMAT_RGBA_8888 /* Default image format. */
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#endif
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#define DEFAULT_DMA_HEAP_PATH "/dev/dma_heap/system-uncached"
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#define DEFAULT_DMA32_HEAP_PATH "/dev/dma_heap/system-uncached-dma32"
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#define RV1106_DEFAULT_DMA_HEAP_PATH "/dev/rk_dma_heap/rk-dma-heap-cma"
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#define IM2D_SLT_DMA_HEAP_PATH DEFAULT_DMA32_HEAP_PATH
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#define IM2D_SLT_DEFAULT_INPUT_PATH "/data/rga_slt"
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#define IM2D_SLT_DEFAULT_OUTPUT_PATH "/data/rga_slt"
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/* crc32 golden config */
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#define IM2D_SLT_GENERATE_CRC 0
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#define IM2D_SLT_GENERATE_CRC_GOLDEN_PREFIX "crcdata"
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#define IM2D_SLT_DEFAULT_GOLDEN_PATH "/data/rga_slt/golden"
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#endif /* #ifndef _IM2D_SLT_CONFIG_H_ */
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