# RISC-V CPU ISA extensions. config BR2_RISCV_ISA_RVI bool config BR2_RISCV_ISA_RVM bool config BR2_RISCV_ISA_RVA bool config BR2_RISCV_ISA_RVF bool config BR2_RISCV_ISA_RVD bool config BR2_RISCV_ISA_RVC bool config BR2_RISCV_ISA_RVV bool config BR2_RISCV_ISA_RVXTHEAD bool choice prompt "Target Architecture" default BR2_riscv64_gcxthead config BR2_riscv32_gcxthead bool "RV32GC + X" select BR2_RISCV_ISA_RVI select BR2_RISCV_ISA_RVM select BR2_RISCV_ISA_RVA select BR2_RISCV_ISA_RVF select BR2_RISCV_ISA_RVD select BR2_RISCV_ISA_RVC select BR2_RISCV_ISA_RVXTHEAD select BR2_RISCV_32 help Integer Riscv32 + General (IMAFD) + Compressed (C) + T-Head Xtension (X). config BR2_riscv32_gcvxthead bool "RV32GC + V + X" select BR2_RISCV_ISA_RVI select BR2_RISCV_ISA_RVM select BR2_RISCV_ISA_RVA select BR2_RISCV_ISA_RVF select BR2_RISCV_ISA_RVD select BR2_RISCV_ISA_RVC select BR2_RISCV_ISA_RVV select BR2_RISCV_ISA_RVXTHEAD select BR2_RISCV_32 help Integer Riscv32 + General (IMAFD) + Compressed (C) + T-Head Xtension (X). config BR2_riscv64_gcxthead bool "RV64GC + X" select BR2_RISCV_ISA_RVI select BR2_RISCV_ISA_RVM select BR2_RISCV_ISA_RVA select BR2_RISCV_ISA_RVF select BR2_RISCV_ISA_RVD select BR2_RISCV_ISA_RVC select BR2_RISCV_ISA_RVXTHEAD select BR2_RISCV_64 help Integer Riscv64 + General (IMAFD) + Compressed (C) + T-Head Xtension (X). config BR2_riscv64_gcvxthead bool "RV64GC + V + X" select BR2_RISCV_ISA_RVI select BR2_RISCV_ISA_RVM select BR2_RISCV_ISA_RVA select BR2_RISCV_ISA_RVF select BR2_RISCV_ISA_RVD select BR2_RISCV_ISA_RVC select BR2_RISCV_ISA_RVV select BR2_RISCV_ISA_RVXTHEAD select BR2_RISCV_64 help Integer Riscv64 + General (IMAFD) + Compressed (C) + Vector (V) + T-Head Xtension (X). endchoice # choice # prompt "Target Architecture Size" # default BR2_RISCV_64 config BR2_RISCV_32 bool # "32-bit" select BR2_ARCH_HAS_MMU_MANDATORY config BR2_RISCV_64 bool # "64-bit" select BR2_ARCH_IS_64 select BR2_ARCH_HAS_MMU_OPTIONAL # endchoice choice prompt "Target ABI" default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD # default BR2_RISCV_ABI_ILP32F if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF # default BR2_RISCV_ABI_ILP32 if !BR2_ARCH_IS_64 default BR2_RISCV_ABI_LP64D if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD # default BR2_RISCV_ABI_LP64F if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF # default BR2_RISCV_ABI_LP64 if BR2_ARCH_IS_64 # config BR2_RISCV_ABI_ILP32 # bool # "ilp32" # depends on !BR2_ARCH_IS_64 # config BR2_RISCV_ABI_ILP32F # bool # "ilp32f" # depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF config BR2_RISCV_ABI_ILP32D bool "ilp32d" depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD # config BR2_RISCV_ABI_LP64 # bool # "lp64" # depends on BR2_ARCH_IS_64 # config BR2_RISCV_ABI_LP64F # bool # "lp64f" # depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF config BR2_RISCV_ABI_LP64D bool "lp64d" depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD endchoice config BR2_ARCH default "riscv32" if !BR2_ARCH_IS_64 default "riscv64" if BR2_ARCH_IS_64 config BR2_ENDIAN default "LITTLE" config BR2_GCC_TARGET_ABI default "ilp32" if BR2_RISCV_ABI_ILP32 default "ilp32f" if BR2_RISCV_ABI_ILP32F default "ilp32d" if BR2_RISCV_ABI_ILP32D default "lp64" if BR2_RISCV_ABI_LP64 default "lp64f" if BR2_RISCV_ABI_LP64F default "lp64d" if BR2_RISCV_ABI_LP64D config BR2_READELF_ARCH_NAME default "RISC-V" # vim: ft=kconfig # -*- mode:kconfig; -*-