/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2020 ArtInChip Technology Co.,Ltd.
 * Author: Dehuang Wu <dehuang.wu@artinchip.com>
 */

#ifndef __DT_BINDINGS_AIC_DMA_V10_H
#define __DT_BINDINGS_AIC_DMA_V10_H

#define DMA_SRAM   0
#define DMA_DRAM   1
#define DMA_SPI2   8
#define DMA_SPI3   9
#define DMA_SPI0   10
#define DMA_SPI1   11
#define DMA_I2S0   12
#define DMA_I2S1   13
#define DMA_CODEC  14
#define DMA_CODEC_AMIC 15
#define DMA_UART0  16
#define DMA_UART1  17
#define DMA_UART2  18
#define DMA_UART3  19
#define DMA_UART4  20
#define DMA_UART5  21
#define DMA_UART6  22
#define DMA_UART7  23

#define AIC_DMA_PORTS 24

#endif /* __DT_BINDINGS_AIC_DMA_V10_H */