129 lines
5.6 KiB
C
129 lines
5.6 KiB
C
#ifndef _ICN8XXX_FLASH_H_
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#define _ICN8XXX_FLASH_H_
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#include <linux/delay.h>
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#include "cts_core.h"
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#include "cts_firmware.h"
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//-----------------------------------------------------------------------------
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// Global CONSTANTS
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//-----------------------------------------------------------------------------
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#define MD25D40_ID1 0x514013
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#define MD25D40_ID2 0xC84013
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#define MD25D20_ID1 0x514012
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#define MD25D20_ID2 0xC84012
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#define GD25Q10_ID 0xC84011
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#define MX25L512E_ID 0xC22010
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#define MD25D05_ID 0x514010
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#define MD25D10_ID 0x514011
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#define FLASH_TOTAL_SIZE 0x00010000
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#define FLASH_PAGE_SIZE 0x1000
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#define FLASH_AHB_BASE_ADDR 0x00100000
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#define FLASH_PATCH_PARA_BASE_ADDR (FLASH_TOTAL_SIZE - FLASH_PAGE_SIZE) // allocate 1 page for patch para, 0xff00
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#define FLASH_CODE_INFO_BASE_ADDR (FLASH_PATCH_PARA_BASE_ADDR - FLASH_PAGE_SIZE) // 0xfe00,allocate 1 page for system para
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#define FLASH_CRC_ADDR (FLASH_AHB_BASE_ADDR + FLASH_CODE_INFO_BASE_ADDR + 0x00) // 0xfe00
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#define FLASH_CODE_LENGTH_ADDR (FLASH_AHB_BASE_ADDR + FLASH_CODE_INFO_BASE_ADDR + 0x04) // 0xfe04
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#define SFCTL_BASE_87 (0x0000F600)
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#define CMD_SEL_87 (SFCTL_BASE_87 + 0x0000)
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#define FLASH_ADDR_87 (SFCTL_BASE_87 + 0x0004)
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#define SRAM_ADDR_87 (SFCTL_BASE_87 + 0x0008)
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#define DATA_LENGTH_87 (SFCTL_BASE_87 + 0x000C)
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#define START_DEXC_87 (SFCTL_BASE_87 + 0x0010)
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#define RELEASE_FLASH_87 (SFCTL_BASE_87 + 0x0014)
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#define CLEAR_HW_STATE_87 (SFCTL_BASE_87 + 0x0018)
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#define CRC_RESULT_87 (SFCTL_BASE_87 + 0x001C)
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#define SW_CRC_START_87 (SFCTL_BASE_87 + 0x0020)
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#define SF_BUSY_87 (SFCTL_BASE_87 + 0x0024)
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#define WATCHDOG_CRC_CFG_87 (SFCTL_BASE_87 + 0x0028)
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#define SFCTL_BASE_89 (0x040600)
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#define CMD_SEL_89 (SFCTL_BASE_89 + 0x0000)
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#define FLASH_ADDR_89 (SFCTL_BASE_89 + 0x0004)
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#define SRAM_ADDR_89 (SFCTL_BASE_89 + 0x0008)
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#define DATA_LENGTH_89 (SFCTL_BASE_89 + 0x000C)
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#define START_DEXC_89 (SFCTL_BASE_89 + 0x0010)
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#define RELEASE_FLASH_89 (SFCTL_BASE_89 + 0x0014)
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#define CLEAR_HW_STATE_89 (SFCTL_BASE_89 + 0x0018)
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#define CRC_RESULT_89 (SFCTL_BASE_89 + 0x001C)
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#define SW_CRC_START_89 (SFCTL_BASE_89 + 0x0020)
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#define SF_BUSY_89 (SFCTL_BASE_89 + 0x0024)
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#define FLASH_CMD_FAST_READ 0x01
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#define FLASH_CMD_ERASE_SECTOR 0x02
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#define FLASH_CMD_ERASE_BLOCK 0x03
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#define FLASH_CMD_PAGE_PROGRAM 0x04
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#define FLASH_CMD_READ_STATUS 0x05
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#define FLASH_CMD_READ_IDENTIFICATION 0x06
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#define FLASH_EARSE_4K 0
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#define FLASH_EARSE_32K 1
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#define FLASH_STOR_INFO_ADDR 0xe000
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#define SRAM_EXCHANGE_ADDR 0xd000
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#define SRAM_EXCHANGE_ADDR1 0xd100
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#define SRAM_EXCHANGE_ADDR_89 0x026000
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#define SRAM_EXCHANGE_ADDR1_89 0x026100
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#define FIRMWARA_INFO_AT_BIN_ADDR 0x00f4
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#define B_SIZE 120//96//32 //128//64//32
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//-----------------------------------------------------------------------------
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// Macro DEFINITIONS
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//-----------------------------------------------------------------------------
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//#define swap_ab(a,b) {char temp;temp=a;a=b;b=temp;}
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//#define U16LOBYTE(var) (*(unsigned char *) &var)
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//#define U16HIBYTE(var) (*(unsigned char *)((unsigned char *) &var + 1))
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#define STRUCT_OFFSET(StructName,MemberName) ((int)(&(((StructName*)0)->MemberName)))
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//-----------------------------------------------------------------------------
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// Struct, Union and Enum DEFINITIONS
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//-----------------------------------------------------------------------------
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typedef enum
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{
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R_OK = 0,
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R_FILE_ERR,
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R_STATE_ERR,
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R_ERASE_ERR,
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R_PROGRAM_ERR,
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R_VERIFY_ERR,
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}E_UPGRADE_ERR_TYPE;
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//-----------------------------------------------------------------------------
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// Global VARIABLES
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//-----------------------------------------------------------------------------
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// junfuzhang 20160913, check crc in sram before boot
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extern unsigned short icnt87_sram_crc;
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extern unsigned short icnt87_sram_length;
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//junfuzhang 20160913, adding end
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//-----------------------------------------------------------------------------
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// Function PROTOTYPES
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//-----------------------------------------------------------------------------
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extern unsigned short icnt87_sram_crc;
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extern unsigned short icnt87_sram_length;
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extern int icn87xx_calculate_crc(struct cts_device *cts_dev, unsigned short len);
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extern int icn87xx_boot_sram(struct cts_device *cts_dev);
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extern int icn85xx_bootfrom_sram(struct cts_device *cts_dev);
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extern int icn89xx_bootfrom_sram(struct cts_device *cts_dev);
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extern int icn85xx_read_flashid(struct cts_device *cts_dev);
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extern int icn87xx_read_flashid(struct cts_device *cts_dev);
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extern int icn89xx_read_flashid(struct cts_device *cts_dev);
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extern int icnt85xx_fw_update(struct cts_device *cts_dev,const struct cts_firmware *firmware, bool to_flash);
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extern int icnt87xx_fw_update(struct cts_device *cts_dev,const struct cts_firmware *firmware, bool to_flash);
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extern int icnt89xx_fw_update(struct cts_device *cts_dev,const struct cts_firmware *firmware, bool to_flash);
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#endif
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