122 lines
2.9 KiB
C
122 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022-2025 ArtInChip
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*
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* Authors:
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* keliang.liu <keliang.liu@artinchip.com>
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/mtd/spinand.h>
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#define SPINAND_MFR_XINCUN 0x8C
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#define XINCUN_STATUS_ECC_MASK GENMASK(5, 4)
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#define XINCUN_STATUS_ECC_NO_DETECTED (0)
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#define XINCUN_STATUS_ECC_STATUS_OFF BIT(4)
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#define XINCUN_STATUS_ECC_UNCOR_ERROR BIT(5)
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static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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static int xcsp1aapk_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section)
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return -ERANGE;
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region->offset = 64;
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region->length = 64;
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return 0;
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}
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static int xcsp1aapk_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section)
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return -ERANGE;
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region->offset = 2;
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region->length = 62;
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return 0;
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}
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static const struct mtd_ooblayout_ops xcsp1aapk_ooblayout = {
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.ecc = xcsp1aapk_ooblayout_ecc,
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.free = xcsp1aapk_ooblayout_free,
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};
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static int xt26xxxc_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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status = status & XINCUN_STATUS_ECC_MASK;
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switch (status) {
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case XINCUN_STATUS_ECC_NO_DETECTED:
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return 0;
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case XINCUN_STATUS_ECC_UNCOR_ERROR:
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return -EBADMSG;
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case XINCUN_STATUS_ECC_STATUS_OFF:
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return 4;
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case XINCUN_STATUS_ECC_MASK:
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return 8;
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct spinand_info xincun_spinand_table[] = {
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SPINAND_INFO("XCSP1AAPK-IT",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 40, 1, 1, 1),
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NAND_ECCREQ(8, 528),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&xcsp1aapk_ooblayout,
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xt26xxxc_ecc_get_status)),
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};
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static int xincun_spinand_init(struct spinand_device *spinand)
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{
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return 0;
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}
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static void xincun_spinand_cleanup(struct spinand_device *spinand)
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{
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}
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static const struct spinand_manufacturer_ops xincun_spinand_manuf_ops = {
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.init = xincun_spinand_init,
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.cleanup = xincun_spinand_cleanup
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};
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const struct spinand_manufacturer xincun_spinand_manufacturer = {
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.id = SPINAND_MFR_XINCUN,
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.name = "XINCUN",
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.chips = xincun_spinand_table,
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.nchips = ARRAY_SIZE(xincun_spinand_table),
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.ops = &xincun_spinand_manuf_ops,
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};
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