123 lines
3.0 KiB
C
123 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2023-2025 ArtInChip
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*
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/mtd/spinand.h>
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#define SPINAND_MFR_ZBIT 0x5E
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static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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static int zb35q01a_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 3)
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return -ERANGE;
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region->offset = (16 * section) + 3;
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region->length = 13;
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return 0;
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}
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static int zb35q01a_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 3)
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return -ERANGE;
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region->offset = (16 * section) + 1;
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region->length = 2;
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return 0;
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}
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static const struct mtd_ooblayout_ops zb35q01a_ooblayout = {
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.ecc = zb35q01a_ooblayout_ecc,
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.free = zb35q01a_ooblayout_free,
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};
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static int zb35q01a_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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switch (status & STATUS_ECC_MASK) {
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case STATUS_ECC_NO_BITFLIPS:
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return 0;
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case STATUS_ECC_UNCOR_ERROR:
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return -EBADMSG;
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case STATUS_ECC_HAS_BITFLIPS:
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return 4;
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case STATUS_ECC_MASK:
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return 8;
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct spinand_info zbit_spinand_table[] = {
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SPINAND_INFO("ZB35Q01A",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x41),
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NAND_MEMORG(1, 2048, 64, 64, 1024, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&zb35q01a_ooblayout,
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zb35q01a_ecc_get_status)),
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SPINAND_INFO("ZB35Q04A",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x44),
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NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1),
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NAND_ECCREQ(8, 528),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&zb35q01a_ooblayout,
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zb35q01a_ecc_get_status)),
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};
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static int zbit_spinand_init(struct spinand_device *spinand)
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{
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return 0;
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}
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static void zbit_spinand_cleanup(struct spinand_device *spinand)
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{
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}
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static const struct spinand_manufacturer_ops zbit_spinand_manuf_ops = {
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.init = zbit_spinand_init,
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.cleanup = zbit_spinand_cleanup
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};
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const struct spinand_manufacturer zbit_spinand_manufacturer = {
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.id = SPINAND_MFR_ZBIT,
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.name = "Zbit Semi",
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.chips = zbit_spinand_table,
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.nchips = ARRAY_SIZE(zbit_spinand_table),
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.ops = &zbit_spinand_manuf_ops,
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};
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