129 lines
3.9 KiB
C
129 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2021 ArtInChip Technology Co., Ltd.
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* Author: Keliang Liu <keliang.liu@artinchip.com>
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*/
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#ifndef __AICMAC_1588_H__
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#define __AICMAC_1588_H__
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#include <linux/ptp_clock_kernel.h>
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#include <linux/net_tstamp.h>
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#include "aicmac.h"
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#define AICMAC_PTP_REF_NAME "ptp_ref"
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#define AICMAC_PTP_REG_BASE 0x100
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/* IEEE 1588 PTP register offsets */
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/* Timestamp Control Reg */
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#define PTP_TMSTMP_CTL 0x00
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/* Sub-Second Increment Reg */
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#define PTP_SUB_SEC_INCR 0x04
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/* Timestamp Addend Reg */
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#define PTP_TMSMP_ADDEND 0x08
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/* System Time – Seconds Reg */
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#define PTP_SYS_TIME_SEC 0x0C
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/* System Time – Nanoseconds Reg */
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#define PTP_SYS_TIME_NANO_SEC 0x10
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/* System Time – Seconds Update Reg */
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#define PTP_UPDT_TIME_SEC 0x14
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/* System Time – Nanoseconds Update Reg */
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#define PTP_UPDT_TIME_NANO_SEC 0x18
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#define PTP_STNSUR_ADDSUB_SHIFT 31
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/* 10e9-1 ns */
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#define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00
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/* ~0.466 ns */
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#define PTP_BINARY_ROLLOVER_MODE 0x80000000
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/* PTP Timestamp control register defines */
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/* Timestamp Enable */
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#define PTP_TCR_TSENA BIT(0)
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/* Timestamp Fine/Coarse Update */
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#define PTP_TCR_TSCFUPDT BIT(1)
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/* Timestamp Initialize */
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#define PTP_TCR_TSINIT BIT(2)
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/* Timestamp Update */
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#define PTP_TCR_TSUPDT BIT(3)
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/* Timestamp Interrupt Trigger Enable */
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#define PTP_TCR_TSTRIG BIT(4)
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/* Addend Reg Update */
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#define PTP_TCR_TSADDREG BIT(5)
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/* Enable Timestamp for All Frames */
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#define PTP_TCR_TSENALL BIT(8)
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/* Digital or Binary Rollover Control */
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#define PTP_TCR_TSCTRLSSR BIT(9)
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/* Enable PTP packet Processing for Version 2 Format */
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#define PTP_TCR_TSVER2ENA BIT(10)
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/* Enable Processing of PTP over Ethernet Frames */
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#define PTP_TCR_TSIPENA BIT(11)
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/* Enable Processing of PTP Frames Sent over IPv6-UDP */
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#define PTP_TCR_TSIPV6ENA BIT(12)
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/* Enable Processing of PTP Frames Sent over IPv4-UDP */
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#define PTP_TCR_TSIPV4ENA BIT(13)
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/* Enable Timestamp Snapshot for Event Messages */
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#define PTP_TCR_TSEVNTENA BIT(14)
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/* Enable Snapshot for Messages Relevant to Master */
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#define PTP_TCR_TSMSTRENA BIT(15)
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/* Select PTP packets for Taking Snapshots
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* On gmac4 specifically:
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* Enable SYNC, Pdelay_Req, Pdelay_Resp when TSEVNTENA is enabled.
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* or
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* Enable SYNC, Follow_Up, Delay_Req, Delay_Resp, Pdelay_Req, Pdelay_Resp,
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* Pdelay_Resp_Follow_Up if TSEVNTENA is disabled
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*/
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#define PTP_TCR_SNAPTYPSEL_1 BIT(16)
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/* Enable MAC address for PTP Frame Filtering */
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#define PTP_TCR_TSENMACADDR BIT(18)
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/* SSIR defines */
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#define PTP_SSIR_SSINC_MASK 0xff
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#define GMAC4_PTP_SSIR_SSINC_SHIFT 16
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#define AICMAC_PPS_MAX 4
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struct aicmac_pps_cfg {
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bool available;
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struct timespec64 start;
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struct timespec64 period;
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};
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struct aicmac_1588_data {
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void __iomem *ptpaddr;
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s32 ptp_max_adj;
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struct clk *clk_ptp_ref;
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unsigned int clk_ptp_rate;
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unsigned int clk_ref_rate;
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unsigned int default_addend;
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spinlock_t ptp_lock; /*global lock for ptp module*/
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_clock_ops;
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struct hwtstamp_config tstamp_config;
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struct aicmac_pps_cfg pps[AICMAC_PPS_MAX];
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int hwts_tx_en;
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int hwts_rx_en;
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u32 sub_second_inc;
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u32 systime_flags;
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};
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struct aicmac_1588_data *aicmac_1588_init_data(struct platform_device *pdev,
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struct device_node *np);
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void aicmac_1588_init_clk(struct platform_device *pdev,
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struct aicmac_1588_data *ptp_data, struct clk *clk);
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int aicmac_1588_init(void *priv_ptr);
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int aicmac_1588_register(void *priv_ptr);
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void aicmac_1588_destroy(void *priv_ptr);
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int aicmac_1588_hwtstamp_set(struct net_device *dev, struct ifreq *ifr);
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int aicmac_1588_hwtstamp_get(struct net_device *dev, struct ifreq *ifr);
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void aicmac_1588_get_tx_hwtstamp(void *priv_ptr, void *p_ptr,
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struct sk_buff *skb);
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void aicmac_1588_get_rx_hwtstamp(void *priv_ptr, void *p_ptr, void *np_ptr,
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struct sk_buff *skb);
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#endif /* __AICMAC_1588_H__ */
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