136 lines
3.3 KiB
C
136 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 ArtInChip
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*
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* Authors:
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* keliang.liu <keliang.liu@artinchip.com>
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*/
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#ifndef __UBOOT__
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#include <malloc.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#endif
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#include <linux/bitops.h>
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#include <linux/mtd/spinand.h>
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#define SPINAND_MFR_BYTE 0x68
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static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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static int by5f1gq5_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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return -ERANGE;
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}
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static int by5f1gq5_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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return -ERANGE;
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}
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static const struct mtd_ooblayout_ops by5f1gq5_ooblayout = {
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.ecc = by5f1gq5_ooblayout_ecc,
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.rfree = by5f1gq5_ooblayout_free,
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};
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static int by5f1gq5_select_target(struct spinand_device *spinand,
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unsigned int target)
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{
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struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0xc2, 1),
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SPI_MEM_OP_NO_ADDR,
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SPI_MEM_OP_NO_DUMMY,
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SPI_MEM_OP_DATA_OUT(1, spinand->scratchbuf, 1));
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*spinand->scratchbuf = target;
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return spi_mem_exec_op(spinand->slave, &op);
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}
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static int by5f1gq5_ecc_get_status(struct spinand_device *spinand, u8 status)
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{
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switch (status & STATUS_ECC_MASK) {
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case STATUS_ECC_NO_BITFLIPS:
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return 0;
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case STATUS_ECC_UNCOR_ERROR:
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return -EBADMSG;
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case STATUS_ECC_HAS_BITFLIPS:
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return ((status & STATUS_ECC_MASK) >> 4);
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct spinand_info byte_spinand_table[] = {
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SPINAND_INFO("BY5F1GQ5UAYIG",
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SPINAND_ID(0x1B),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&by5f1gq5_ooblayout, by5f1gq5_ecc_get_status),
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SPINAND_SELECT_TARGET(by5f1gq5_select_target)),
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};
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static int byte_spinand_init(struct spinand_device *spinand)
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{
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pr_info("BYTe %s\n", __func__);
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return 0;
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}
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static void byte_spinand_cleanup(struct spinand_device *spinand)
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{
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pr_info("BYTe %s\n", __func__);
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}
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static int byte_spinand_detect(struct spinand_device *spinand)
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{
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u8 *id = spinand->id.data;
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int ret;
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if (id[1] != SPINAND_MFR_BYTE)
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return 0;
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ret = spinand_match_and_init(spinand, byte_spinand_table,
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ARRAY_SIZE(byte_spinand_table),
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&id[2]);
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if (ret)
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return ret;
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return 1;
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}
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static const struct spinand_manufacturer_ops byte_spinand_manuf_ops = {
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.detect = byte_spinand_detect,
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.init = byte_spinand_init,
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.cleanup = byte_spinand_cleanup
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};
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const struct spinand_manufacturer byte_spinand_manufacturer = {
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.id = SPINAND_MFR_BYTE,
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.name = "BYTE",
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.ops = &byte_spinand_manuf_ops,
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};
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