104 lines
2.8 KiB
C
104 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2021 ArtInChip Technology Co., Ltd
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*/
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#ifndef __D211_H__
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#define __D211_H__
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#include <linux/sizes.h>
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/*
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* Skip lowlelvel init, for SPL, boot rom already init cp15, for U-Boot, SPL
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* already enable cache, cpu_init_cp15 will disable it again.
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*/
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* Platform memory information */
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#ifndef CONFIG_SEMIHOSTING
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#define D211_SRAM_BASE (0x00100000)
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#define D211_SRAM_SIZE (0x00018000)
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#define D211_SDRAM_BASE (0x40000000)
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#else
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/* mapping to dram area for fvp */
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#define D211_SRAM_BASE (0x84000000)
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#define D211_SRAM_SIZE (0x00018000)
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#define D211_SDRAM_BASE (0x80000000)
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#endif
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/*
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* Boot logo size
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* Uboot support png/jpg image logo, but spl just support png image
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*/
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#define LOGO_MAX_SIZE (CONFIG_LOGO_IMAGE_SIZE << 10)
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/* Miscellaneous configurable options */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SYS_HZ_CLOCK 4000000 /* Timer is clocked at 4MHz */
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#define RISCV_SMODE_TIMER_FREQ CONFIG_SYS_HZ_CLOCK
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#define RISCV_MMODE_TIMER_FREQ CONFIG_SYS_HZ_CLOCK
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#define CONFIG_SYS_MAXARGS 32
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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#define CONFIG_SYS_CBSIZE SZ_1K
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN SZ_16M
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/* Allow to overwrite env for serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* SPL support */
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#ifdef CONFIG_SPL
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#define BROM_RAM_SIZE 0x3000
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#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE_LIMIT)
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/* Set SPL initali stack to SRAM Top */
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#define CONFIG_SPL_STACK (D211_SRAM_BASE + D211_SRAM_SIZE)
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#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE)
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 /* 8 KiB */
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/* SPL Falcon */
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x43F00000
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#ifndef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "bootcfg.txt"
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#endif
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#endif /* #ifdef CONFIG_SPL */
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/* SPL -> Uboot */
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_UBOOT_START
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/*MMC SD*/
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#define CONFIG_SYS_MMC_MAX_DEVICE 2
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#define MMC_SUPPORTS_TUNING
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/* NAND support */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_U_BOOT_OFFS (0x00000000)
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/* SPI NOR Flash support */
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/* UBoot -> Kernel */
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#define CONFIG_LOADADDR D211_SDRAM_BASE
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* DRAM */
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#define CONFIG_SYS_SDRAM_BASE D211_SDRAM_BASE
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/* Extra environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS ""
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MTDPARTS_RUNTIME
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/* USB */
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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#endif /* __D211_H__ */
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