817 lines
19 KiB
C
817 lines
19 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2021 ArtInChip Technology Co., Ltd
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* Author: Dehuang Wu <dehuang.wu@artinchip.com>
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*/
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#include <common.h>
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#include <command.h>
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <malloc.h>
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#include <artinchip/aicupg.h>
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#include <mtd.h>
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#include <env.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/mtd.h>
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#include "nand_fwc_priv.h"
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#include "nand_fwc_spl.h"
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#include "spi_enc_spl.h"
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#include <u-boot/crc.h>
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#include <artinchip/firmware_security.h>
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struct aicupg_nand_spl {
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struct mtd_info *mtd;
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u32 spl_blocks[SPL_NAND_IMAGE_BACKUP_NUM];
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u32 rx_size;
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u32 buf_size;
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u8 *image_buf;
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u32 spienc_tweak;
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};
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static struct aicupg_nand_spl g_nand_spl;
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/*
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* FSBL(SPL) candidate block search table
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*
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* This table define 16 candidate block numbers to save FSBL(First Stage Boot
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* Loader).
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*
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* How to use it:
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* - FSBL Programmer
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* When program FSBL, programmer need to find out first 4 good blocks in this
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* order, then program FSBL to those blocks, including Page table.
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* - BROM
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* BROM shall try to read the FSBL in order of block id in this table, and
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* BROM only try to read FSBL in first good block.
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*
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* Why to do this:
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* - Reason
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* AIC solution need to support some bad NANDs, those NANDs can't guarantee
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* first 4 blocks are good, so AIC designed this candidate search table to
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* increase the find-out good block rate.
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* This table is fixed, blocks distributes in first 1024 blocks.
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*/
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static u32 spl_candidate_block_table[SPL_CANDIDATE_BLOCK_NUM] = {
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0, 1, 2, 3, 202, 32, 312, 296, 142,
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136, 392, 526, 452, 708, 810, 552, 906, 674,
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};
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/*
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* 0xFF is good block mark value.
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* 0xAC is AIC SPL reserved mark value.
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*/
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#define SPL_BLOCK_MARK 0xAC
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#define IS_BADBLOCK(oob0, oob1) \
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(((oob0) != 0xFF && (oob0) != SPL_BLOCK_MARK) || ((oob1) != 0xFF))
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#define IS_SPLBLOCK(oob0, oob1) (((oob0) == SPL_BLOCK_MARK))
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#ifdef DEBUG
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static void mtd_dump_buf(const u8 *buf, uint len)
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{
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int i, j;
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for (i = 0; i < len; ) {
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printf("0x%08x:\t", i);
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for (j = 0; j < 8; j++)
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printf("%02x ", buf[i + j]);
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printf(" ");
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i += 8;
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for (j = 0; j < 8; j++)
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printf("%02x ", buf[i + j]);
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printf("\n");
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i += 8;
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}
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}
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#endif
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static s32 get_good_blocks_for_spl(struct mtd_info *mtd, u32 *spl_blocks,
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u32 *blkmark, u32 num)
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{
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struct mtd_oob_ops ops;
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struct nand_device *nand = mtd_to_nanddev(mtd);
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ulong bad_block_mark_flag_for_test = 0;
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char *env_bad_bock_mark_flag;
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loff_t offs;
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s32 ret, i, blkidx, cnt;
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u8 buf[4];
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ret = 0;
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cnt = 0;
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/*
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* bad_block_mark_flag in ENV is for test
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*
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* if bad_block_mark_flag = 0xFF, means first 8 candidate blocks is
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* marked as bad block.
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*/
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env_bad_bock_mark_flag = env_get("bad_block_mark_flag");
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if (env_bad_bock_mark_flag)
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bad_block_mark_flag_for_test =
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hextoul(env_bad_bock_mark_flag, NULL);
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memset(&ops, 0, sizeof(struct mtd_oob_ops));
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ops.ooblen = 2;
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ops.oobbuf = buf;
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ops.mode = MTD_OPS_RAW;
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for (i = 0; i < num; i++)
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spl_blocks[i] = SPL_INVALID_BLOCK_IDX;
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for (i = 0; i < SPL_CANDIDATE_BLOCK_NUM; i++) {
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blkidx = spl_candidate_block_table[i];
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/* For multi-plane device, don't use block 1 & 3, because
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* boot rom cannot read data from block 1 and 3
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*/
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if ((nand->memorg.planes_per_lun != 1) &&
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(blkidx == 1 || blkidx == 3))
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continue;
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offs = mtd->erasesize * blkidx;
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ret = mtd_read_oob(mtd, offs, &ops);
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if (ret) {
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pr_err("Read OOB from block %d failed. ret = %d\n", blkidx, ret);
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continue;
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}
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if (IS_BADBLOCK(buf[0], buf[1])) {
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pr_err("Block %d is bad 0x%x 0x%x.\n", blkidx, buf[0],
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buf[1]);
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continue;
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}
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if (bad_block_mark_flag_for_test & (1 << i)) {
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pr_err("Block %d is marked as bad for test.\n", blkidx);
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continue;
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}
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if (IS_SPLBLOCK(buf[0], buf[1]))
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/* Block already marked as SPL block */
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blkmark[cnt] = 1;
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else
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blkmark[cnt] = 0;
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/* Found one good block */
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pr_info("Found good block %d\n", blkidx);
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spl_blocks[cnt++] = blkidx;
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if (cnt == num)
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break;
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}
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if (cnt == 0)
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ret = -1;
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return ret;
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}
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static s32 mark_image_block_as_reserved(struct mtd_info *mtd, u32 blkidx)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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struct mtd_oob_ops ops;
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struct nand_pos pos;
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loff_t offs;
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s32 ret;
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u32 entry;
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u8 buf[4];
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memset(&ops, 0, sizeof(struct mtd_oob_ops));
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/* Mark SPL reserve at OOB */
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buf[0] = SPL_BLOCK_MARK;
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ops.ooblen = 1;
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ops.oobbuf = buf;
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ret = 0;
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offs = mtd->erasesize * blkidx;
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ret = mtd_write_oob(mtd, offs, &ops);
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if (ret) {
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pr_err("Mark blk %d as bad failed.\n", blkidx);
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return ret;
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}
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nanddev_offs_to_pos(nand, offs, &pos);
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entry = nanddev_bbt_pos_to_entry(nand, &pos);
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ret = nanddev_bbt_set_block_status(nand, entry,
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NAND_BBT_BLOCK_FACTORY_BAD);
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if (ret)
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pr_err("Set blk %d bad status failed.\n", blkidx);
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pr_info("Set blk %d bad status OK.\n", blkidx);
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return ret;
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}
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/*
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* Mark SPL reserve blocks, so that UBI and other partition won't use it
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*/
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s32 nand_fwc_spl_reserve_blocks(void)
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{
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u32 spl_blocks[SPL_NAND_IMAGE_BACKUP_NUM];
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u32 block_mark[SPL_NAND_IMAGE_BACKUP_NUM];
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struct mtd_info *mtd;
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s32 ret, i;
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mtd = get_mtd_device(NULL, 0);
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if (IS_ERR_OR_NULL(mtd)) {
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pr_err("There is no mtd device.\n");
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return -1;
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}
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ret = get_good_blocks_for_spl(mtd, spl_blocks, block_mark,
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SPL_NAND_IMAGE_BACKUP_NUM);
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if (ret) {
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pr_err("Get SPL blocks failed.\n");
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return ret;
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}
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for (i = 0; i < SPL_NAND_IMAGE_BACKUP_NUM; i++) {
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if (spl_blocks[i] != SPL_INVALID_BLOCK_IDX) {
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if (spl_blocks[i] < 4) /* Don't mark first 4 blocks */
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continue;
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if (block_mark[i])
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continue;
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/* Not marked yet, mark it */
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ret = mark_image_block_as_reserved(mtd, spl_blocks[i]);
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if (ret) {
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pr_err("Mark SPL block failed.\n");
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return -1;
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}
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}
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}
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return 0;
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}
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static s32 nand_spl_get_good_blocks(struct aicupg_nand_spl *spl)
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{
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u32 block_mark[SPL_NAND_IMAGE_BACKUP_NUM];
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s32 ret;
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ret = get_good_blocks_for_spl(spl->mtd, spl->spl_blocks, block_mark,
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SPL_NAND_IMAGE_BACKUP_NUM);
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if (ret) {
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pr_err("Get blocks for SPL failed.\n");
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return -1;
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}
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return ret;
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}
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static s32 nand_spl_erase_image_blocks(struct aicupg_nand_spl *spl)
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{
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struct erase_info erase_op = {};
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loff_t offs;
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u32 blkidx;
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s32 ret, i;
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ret = 0;
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for (i = 0; i < SPL_NAND_IMAGE_BACKUP_NUM; i++) {
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blkidx = spl->spl_blocks[i];
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if (blkidx == SPL_INVALID_BLOCK_IDX)
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continue;
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offs = spl->mtd->erasesize * blkidx;
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erase_op.mtd = spl->mtd;
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erase_op.addr = offs;
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erase_op.len = spl->mtd->erasesize;
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erase_op.scrub = true;
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ret = mtd_erase(spl->mtd, &erase_op);
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if (ret) {
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pr_err("Erase block %d failed.\n", blkidx);
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return ret;
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}
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}
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return ret;
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}
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static u32 calc_page_checksum(u8 *start, u32 size)
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{
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u8 *p;
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u32 i, val, sum, rest, cnt;
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p = start;
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i = 0;
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sum = 0;
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cnt = size >> 2;
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for (i = 0; i < cnt; i++) {
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p = &start[i * 4];
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val = (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0];
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sum += val;
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}
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/* Calculate not 32 bit aligned part */
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rest = size - (cnt << 2);
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p = &start[cnt * 4];
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val = 0;
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for (i = 0; i < rest; i++)
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val += (p[i] << (i * 8));
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sum += val;
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return sum;
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}
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static s32 spl_build_page_table(struct aicupg_nand_spl *spl,
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struct nand_page_table *pt)
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{
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u32 pcnt, pgidx, data_size, i, sumval, pa, blkidx;
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u32 page_per_blk, page_in_blk;
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u8 *page_data, *p, *end;
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u32 slice_size;
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s32 ret = 0;
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memset(pt, 0xFF, sizeof(*pt));
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pt->head.magic[0] = 'A';
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pt->head.magic[1] = 'I';
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pt->head.magic[2] = 'C';
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pt->head.magic[3] = 'P';
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pr_debug("%s, going to generate page table.\n", __func__);
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slice_size = spl->mtd->writesize;
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pt->head.page_size = spl->mtd->writesize;
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page_per_blk = spl->mtd->erasesize / spl->mtd->writesize;
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page_data = malloc(PAGE_MAX_SIZE);
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if (!page_data)
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return -1;
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pcnt = ROUNDUP(spl->buf_size, slice_size) / slice_size;
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pt->head.entry_cnt = pcnt + 1;
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if (pt->head.entry_cnt > 2 * PAGE_TABLE_MAX_ENTRY) {
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pr_err("Error, SPL is too large entry cnt %d, max %d.\n",
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pt->head.entry_cnt, 2 * PAGE_TABLE_MAX_ENTRY);
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ret = -1;
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goto out;
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}
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p = spl->image_buf;
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end = spl->image_buf + spl->buf_size;
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/* The following code looks weird, the explaination:
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* 1. The original design is use 4 blocks to store 4 backup of SPL,
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* but the SPL code size is larger than the expectation (More than 126KB)
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* so the new solution is use 4 blocks to store 1 backup of SPL
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* 2. Boot ROM only care the first part of SPL, so the caculate first 101 page
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* data's checksum is enough
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* 3. If the SPL data is more than 101 pages, the page address will be stored
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* to original backup1's place, corresponding checksum will be stored to
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* original backup2's place.
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*/
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/* The first page is used to store page table */
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for (pgidx = 1; pgidx < pcnt + 1; pgidx++) {
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if ((p + slice_size) <= end)
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data_size = slice_size;
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else
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data_size = (unsigned long)end - (unsigned long)p;
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memset(page_data, 0xFF, slice_size);
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memcpy(page_data, p, data_size);
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p += data_size;
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sumval = calc_page_checksum(page_data, slice_size);
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if (pgidx > 2 * PAGE_TABLE_MAX_ENTRY) {
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pr_err("Error, SPL is too large.\n");
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ret = -1;
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goto out;
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}
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/* Calculate where the data is stored */
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i = pgidx / page_per_blk;
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page_in_blk = pgidx % page_per_blk;
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blkidx = spl->spl_blocks[i];
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if (blkidx == SPL_INVALID_BLOCK_IDX) {
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pr_info("%s, block id is invalid\n", __func__);
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ret = -1;
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goto out;
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}
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pa = (blkidx << 6) + page_in_blk;
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if (pgidx < PAGE_TABLE_MAX_ENTRY) {
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pt->entry[pgidx].pageaddr[0] = pa;
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pt->entry[pgidx].checksum = ~sumval;
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} else {
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/* Calculate where the info is stored */
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pt->entry[pgidx % PAGE_TABLE_MAX_ENTRY].pageaddr[1] =
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pa;
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pt->entry[pgidx % PAGE_TABLE_MAX_ENTRY].pageaddr[2] =
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~sumval;
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}
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}
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pgidx = 0;
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blkidx = spl->spl_blocks[0];
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pa = (blkidx << 6) + pgidx;
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pt->entry[0].pageaddr[0] = pa;
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pt->entry[0].checksum = 0;
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memset(page_data, 0xFF, PAGE_TABLE_USE_SIZE);
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memcpy(page_data, pt, sizeof(*pt));
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sumval = calc_page_checksum(page_data, PAGE_TABLE_USE_SIZE);
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pt->entry[0].checksum = ~sumval;
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ret = 0;
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out:
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free(page_data);
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return ret;
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}
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/*
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* Write SPL image to flash blocks
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*/
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static s32 nand_fwc_spl_program(struct fwc_info *fwc,
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struct aicupg_nand_spl *spl)
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{
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u8 *page_data = NULL, *rd_page_data = NULL, *p, *end;
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struct nand_page_table *pt = NULL;
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u32 data_size, blkidx, blkcnt, pa, pgidx, slice_size;
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size_t retlen;
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loff_t offs;
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s32 ret = -1, i;
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u32 trans_size;
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u32 page_per_blk;
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fwc->calc_partition_crc = crc32(fwc->calc_partition_crc, spl->image_buf, fwc->meta.size);
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#ifdef CONFIG_AICUPG_FIRMWARE_SECURITY
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firmware_security_decrypt(spl->image_buf, spl->rx_size);
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#endif
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pt = malloc(PAGE_TABLE_USE_SIZE);
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page_data = malloc(PAGE_MAX_SIZE);
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if (!page_data) {
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pr_err("malloc page_data failed.\n");
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ret = -ENOMEM;
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goto out;
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}
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#ifdef CONFIG_AICUPG_SINGLE_TRANS_BURN_CRC32_VERIFY
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rd_page_data = malloc(PAGE_MAX_SIZE);
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if (!rd_page_data || !pt) {
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pr_err("malloc rd_page_data failed.\n");
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ret = -ENOMEM;
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goto out;
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}
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#endif
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ret = spl_build_page_table(spl, pt);
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if (ret) {
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pr_err("Generate page table failed.\n");
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ret = -1;
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goto out;
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}
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slice_size = spl->mtd->writesize;
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page_per_blk = spl->mtd->erasesize / spl->mtd->writesize;
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/* How many blocks will be used */
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blkcnt = (pt->head.entry_cnt + page_per_blk - 1) / page_per_blk;
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for (i = 0; i < blkcnt; i++) {
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blkidx = spl->spl_blocks[i];
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if (blkidx < 4) {
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/* First 4 blocks don't mark */
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continue;
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}
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mark_image_block_as_reserved(spl->mtd, blkidx);
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}
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/* Program page table and image data to blocks */
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blkidx = spl->spl_blocks[0];
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if (blkidx == SPL_INVALID_BLOCK_IDX) {
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ret = -1;
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goto out;
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}
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/* Page table is written to the first page. */
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memset(page_data, 0xFF, PAGE_TABLE_USE_SIZE);
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memcpy(page_data, pt, sizeof(*pt));
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pa = pt->entry[0].pageaddr[0];
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offs = pa * spl->mtd->writesize;
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pr_debug("Write page table to blk %d pa 0x%x., off 0x%x\n", blkidx, pa,
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(u32)offs);
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#ifdef CONFIG_ARTINCHIP_SPIENC
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spi_enc_set_bypass(AIC_SPIENC_BYPASS_ENABLE);
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#endif
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ret = mtd_write(spl->mtd, offs, PAGE_TABLE_USE_SIZE, &retlen,
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page_data);
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#ifdef CONFIG_ARTINCHIP_SPIENC
|
|
spi_enc_set_bypass(AIC_SPIENC_BYPASS_DISABLE);
|
|
#endif
|
|
if (ret) {
|
|
pr_err("Write SPL page %d failed.\n", 0);
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
|
|
/* Write image data to page */
|
|
trans_size = 0;
|
|
p = spl->image_buf;
|
|
end = p + spl->buf_size;
|
|
for (pgidx = 1; pgidx < pt->head.entry_cnt; pgidx++) {
|
|
i = pgidx / page_per_blk;
|
|
blkidx = spl->spl_blocks[i];
|
|
if ((p + slice_size) <= end)
|
|
data_size = slice_size;
|
|
else
|
|
data_size = (unsigned long)end - (unsigned long)p;
|
|
memset(page_data, 0xFF, slice_size);
|
|
memset(rd_page_data, 0xFF, slice_size);
|
|
memcpy(page_data, p, data_size);
|
|
|
|
p += data_size;
|
|
if (pgidx < PAGE_TABLE_MAX_ENTRY)
|
|
pa = pt->entry[pgidx].pageaddr[0];
|
|
else
|
|
pa = pt->entry[pgidx % PAGE_TABLE_MAX_ENTRY].pageaddr[1];
|
|
offs = pa * spl->mtd->writesize;
|
|
pr_debug("Write data to blk %d pa 0x%x., off 0x%x\n", blkidx,
|
|
pa, (u32)offs);
|
|
ret = mtd_write(spl->mtd, offs, slice_size, &retlen, page_data);
|
|
if (ret) {
|
|
pr_err("Write SPL page %d failed.\n", pgidx);
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
#ifdef CONFIG_AICUPG_SINGLE_TRANS_BURN_CRC32_VERIFY
|
|
// Read data to calc crc
|
|
ret = mtd_read(spl->mtd, offs, slice_size, &retlen,
|
|
rd_page_data);
|
|
if (ret) {
|
|
pr_err("Read SPL page %d failed.\n", pgidx);
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
|
|
if (crc32(0, page_data, slice_size) != crc32(0, rd_page_data, slice_size)) {
|
|
pr_err("calc_len:%d\n", slice_size);
|
|
pr_err("crc err at trans len %u\n", trans_size);
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
#endif
|
|
trans_size += data_size;
|
|
}
|
|
|
|
out:
|
|
if (page_data)
|
|
free(page_data);
|
|
if (pt)
|
|
free(pt);
|
|
if (rd_page_data)
|
|
free(rd_page_data);
|
|
return ret;
|
|
}
|
|
|
|
static s32 verify_page_table(struct aicupg_nand_spl *spl, u32 blkidx,
|
|
struct nand_page_table *pt, u32 len)
|
|
{
|
|
u8 page_data[PAGE_MAX_SIZE] = {0};
|
|
struct mtd_oob_ops ops;
|
|
struct mtd_info *mtd;
|
|
loff_t offs;
|
|
u32 sumval;
|
|
s32 ret;
|
|
|
|
mtd = spl->mtd;
|
|
offs = mtd->erasesize * blkidx;
|
|
|
|
memset(&ops, 0, sizeof(struct mtd_oob_ops));
|
|
ops.len = PAGE_TABLE_USE_SIZE;
|
|
ops.datbuf = page_data;
|
|
//ops.mode = MTD_OPS_AUTO_OOB;
|
|
|
|
#ifdef CONFIG_ARTINCHIP_SPIENC
|
|
spi_enc_set_bypass(AIC_SPIENC_BYPASS_ENABLE);
|
|
#endif
|
|
ret = mtd_read_oob(mtd, offs, &ops);
|
|
#ifdef CONFIG_ARTINCHIP_SPIENC
|
|
spi_enc_set_bypass(AIC_SPIENC_BYPASS_DISABLE);
|
|
#endif
|
|
if (ret)
|
|
return -1;
|
|
|
|
//mtd_dump_buf(page_data, PAGE_TABLE_USE_SIZE);
|
|
memcpy(pt, page_data, len);
|
|
if (strncmp(pt->head.magic, "AICP", 4)) {
|
|
pr_err("Page table magic check failed.\n");
|
|
return -1;
|
|
}
|
|
sumval = calc_page_checksum(page_data, PAGE_TABLE_USE_SIZE);
|
|
if (sumval != 0xFFFFFFFF) {
|
|
pr_err("Page table in block %d checksum 0x%x verify failed.\n",
|
|
blkidx, sumval);
|
|
return -1;
|
|
}
|
|
|
|
pr_debug("Page table verify is OK\n");
|
|
return 0;
|
|
}
|
|
|
|
static s32 verify_image_page(struct aicupg_nand_spl *spl,
|
|
struct nand_page_table *pt)
|
|
{
|
|
u8 *page_data;
|
|
s32 ret = 0, i;
|
|
size_t retlen;
|
|
loff_t offs;
|
|
u32 sumval, cksum;
|
|
u32 pa, slice_size;
|
|
|
|
page_data = malloc(PAGE_MAX_SIZE);
|
|
if (!page_data) {
|
|
pr_err("malloc page_data failed.\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
slice_size = spl->mtd->writesize;
|
|
|
|
for (i = 1; i < pt->head.entry_cnt; i++) {
|
|
if (pt->head.entry_cnt < PAGE_TABLE_MAX_ENTRY) {
|
|
pa = pt->entry[i].pageaddr[0];
|
|
cksum = pt->entry[i].checksum;
|
|
} else {
|
|
pa = pt->entry[i % PAGE_TABLE_MAX_ENTRY].pageaddr[1];
|
|
cksum = pt->entry[i % PAGE_TABLE_MAX_ENTRY].pageaddr[2];
|
|
}
|
|
if (pa == SPL_INVALID_PAGE_ADDR)
|
|
continue;
|
|
offs = pa * spl->mtd->writesize;
|
|
ret = mtd_read(spl->mtd, offs, slice_size, &retlen, page_data);
|
|
if (ret) {
|
|
pr_err("Read page %d, pa 0x%x failed. ret %d\n", i, pa,
|
|
ret);
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
sumval = calc_page_checksum(page_data, slice_size);
|
|
sumval += cksum;
|
|
if (sumval != 0xFFFFFFFF) {
|
|
pr_err("Page %d, pa 0x%x checksum 0x%x is wrong.\n", i,
|
|
pa, sumval);
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
pr_debug("SPL image verify is OK\n");
|
|
out:
|
|
if (page_data)
|
|
free(page_data);
|
|
return ret;
|
|
}
|
|
|
|
static s32 nand_fwc_spl_image_verify(struct aicupg_nand_spl *spl)
|
|
{
|
|
struct nand_page_table *pt = NULL;
|
|
u32 blkidx;
|
|
s32 ret;
|
|
|
|
pt = malloc(PAGE_TABLE_USE_SIZE);
|
|
pr_debug("Verifying SPL image data...\n");
|
|
blkidx = spl->spl_blocks[0];
|
|
if (blkidx == SPL_INVALID_BLOCK_IDX) {
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
ret = verify_page_table(spl, blkidx, pt, sizeof(*pt));
|
|
if (ret) {
|
|
pr_err("Page table in block %d is bad\n", blkidx);
|
|
ret = -1;
|
|
goto out;
|
|
} else {
|
|
pr_info("Page table in block %d is good\n", blkidx);
|
|
}
|
|
|
|
ret = verify_image_page(spl, pt);
|
|
out:
|
|
#ifdef CONFIG_ARTINCHIP_SPIENC
|
|
spi_enc_tweak_select(AIC_SPIENC_USER_TWEAK);
|
|
#endif
|
|
if (pt)
|
|
free(pt);
|
|
return ret;
|
|
}
|
|
|
|
s32 nand_fwc_spl_prepare(struct fwc_info *fwc)
|
|
{
|
|
struct aicupg_nand_priv *priv;
|
|
struct aicupg_nand_spl *spl;
|
|
struct mtd_info *mtd;
|
|
s32 ret;
|
|
|
|
priv = (struct aicupg_nand_priv *)fwc->priv;
|
|
if (!priv)
|
|
return -EINVAL;
|
|
|
|
if (!priv->mtds[0]) {
|
|
pr_err("MTD is NULL\n");
|
|
return -EINVAL;
|
|
}
|
|
/* Should operate the NAND device, not mtd partition */
|
|
mtd = priv->mtds[0]->parent;
|
|
if (!mtd) {
|
|
pr_err("mtd0 %s, mtd 0x%lx\n", priv->mtds[0]->name,
|
|
(unsigned long)mtd);
|
|
pr_err("%s, MTD device is NULL.\n", __func__);
|
|
return -EINVAL;
|
|
}
|
|
|
|
spl = &g_nand_spl;
|
|
|
|
if (spl->image_buf)
|
|
free(spl->image_buf);
|
|
memset(spl, 0, sizeof(struct aicupg_nand_spl));
|
|
spl->mtd = mtd;
|
|
spl->buf_size = ROUNDUP(fwc->meta.size, fwc->block_size);
|
|
|
|
spl->image_buf = malloc(spl->buf_size);
|
|
if (!spl->image_buf) {
|
|
pr_err("Malloc SPL image buffer(%d) failed.\n",
|
|
spl->buf_size);
|
|
return -ENOMEM;
|
|
}
|
|
memset(spl->image_buf, 0xFF, spl->buf_size);
|
|
|
|
ret = nand_spl_get_good_blocks(spl);
|
|
if (ret) {
|
|
pr_err("No good blocks for SPL.\n");
|
|
return -1;
|
|
}
|
|
|
|
ret = nand_spl_erase_image_blocks(spl);
|
|
if (ret) {
|
|
pr_err("spl erase image block failed.\n");
|
|
return -1;
|
|
}
|
|
#ifdef CONFIG_ARTINCHIP_SPIENC
|
|
spi_enc_tweak_select(AIC_SPIENC_HW_TWEAK);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Only write to RAM buffer, and begin to program NAND blocks when rx is
|
|
* finished.
|
|
*/
|
|
s32 nand_fwc_spl_writer(struct fwc_info *fwc, u8 *buf, s32 len)
|
|
{
|
|
struct aicupg_nand_spl *spl = &g_nand_spl;
|
|
s32 ret;
|
|
u8 *dst;
|
|
|
|
if (spl->rx_size + len > spl->buf_size)
|
|
return 0;
|
|
dst = spl->image_buf + spl->rx_size;
|
|
memcpy(dst, buf, len);
|
|
spl->rx_size += len;
|
|
|
|
if (spl->rx_size >= fwc->meta.size) {
|
|
/* SPL image rx is finished, start to program */
|
|
ret = nand_fwc_spl_program(fwc, spl);
|
|
if (ret)
|
|
return 0;
|
|
ret = nand_fwc_spl_image_verify(spl);
|
|
if (ret)
|
|
return 0;
|
|
}
|
|
|
|
return len;
|
|
}
|
|
|
|
|
|
static int do_nand_writespl(struct cmd_tbl *cmdtp, int flag, int argc,
|
|
char *const argv[])
|
|
{
|
|
unsigned long addr, len;
|
|
struct fwc_info fwc;
|
|
struct aicupg_nand_priv *priv;
|
|
int ret = 0;
|
|
|
|
if (argc < 3)
|
|
return CMD_RET_USAGE;
|
|
|
|
addr = hextoul(argv[1], NULL);
|
|
len = hextoul(argv[2], NULL);
|
|
|
|
priv = malloc(sizeof(struct aicupg_nand_priv));
|
|
if (!priv) {
|
|
pr_err("Out of memory, malloc failed.\n");
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
memset(priv, 0, sizeof(struct aicupg_nand_priv));
|
|
priv->mtds[0] = get_mtd_device(NULL, 1);
|
|
if (!priv->mtds[0]) {
|
|
pr_err("Get MTD partition failed.\n");
|
|
ret = -1;
|
|
goto out;
|
|
}
|
|
fwc.meta.size = len;
|
|
fwc.block_size = priv->mtds[0]->writesize;
|
|
fwc.priv = priv;
|
|
|
|
nand_fwc_spl_prepare(&fwc);
|
|
nand_fwc_spl_writer(&fwc, (void *)addr, len);
|
|
|
|
out:
|
|
if (priv)
|
|
free(priv);
|
|
return 0;
|
|
}
|
|
|
|
U_BOOT_CMD(nand_writespl, 3, 0, do_nand_writespl,
|
|
"ArtInChip write SPL command for NAND",
|
|
"nand_writespl <hex spl ram addr> <hex data len>\n"
|
|
);
|