370 lines
8.2 KiB
C
370 lines
8.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Artinchip OHCI driver
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*
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* Copyright (C) 2020 ARTINCHIP – All Rights Reserved
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*
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*
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*/
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/hrtimer.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/usb/ohci_pdriver.h>
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#include <linux/usb.h>
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#include <linux/usb/hcd.h>
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#include "ohci.h"
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#define USB_MAX_CLKS 3
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struct aic_ohci_platform_priv {
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struct clk *clks[USB_MAX_CLKS];
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struct clk *clk48;
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struct reset_control *rst;
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struct reset_control *pwr;
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struct phy *phy;
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};
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#define DRIVER_DESC "OHCI Artinchip driver"
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#define hcd_to_ohci_priv(h) \
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((struct aic_ohci_platform_priv *)hcd_to_ohci(h)->priv)
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static const char hcd_name[] = "ohci-aic";
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static int aic_ohci_platform_power_on(struct platform_device *dev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(dev);
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struct aic_ohci_platform_priv *priv = hcd_to_ohci_priv(hcd);
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int clk, ret;
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ret = reset_control_deassert(priv->pwr);
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if (ret)
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return ret;
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ret = reset_control_deassert(priv->rst);
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if (ret)
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goto err_assert_power;
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/* some SoCs don't have a dedicated 48Mhz clock, but those that do
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* need the rate to be explicitly set
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*/
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if (priv->clk48) {
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ret = clk_set_rate(priv->clk48, 48000000);
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if (ret)
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goto err_assert_reset;
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}
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for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++) {
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ret = clk_prepare_enable(priv->clks[clk]);
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if (ret)
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goto err_disable_clks;
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}
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ret = phy_init(priv->phy);
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if (ret)
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goto err_disable_clks;
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ret = phy_power_on(priv->phy);
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if (ret)
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goto err_exit_phy;
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return 0;
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err_exit_phy:
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phy_exit(priv->phy);
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err_disable_clks:
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while (--clk >= 0)
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clk_disable_unprepare(priv->clks[clk]);
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err_assert_reset:
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reset_control_assert(priv->rst);
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err_assert_power:
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reset_control_assert(priv->pwr);
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return ret;
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}
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static void aic_ohci_platform_power_off(struct platform_device *dev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(dev);
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struct aic_ohci_platform_priv *priv = hcd_to_ohci_priv(hcd);
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int clk;
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reset_control_assert(priv->pwr);
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reset_control_assert(priv->rst);
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phy_power_off(priv->phy);
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phy_exit(priv->phy);
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for (clk = USB_MAX_CLKS - 1; clk >= 0; clk--)
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if (priv->clks[clk])
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clk_disable_unprepare(priv->clks[clk]);
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}
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static struct hc_driver __read_mostly ohci_platform_hc_driver;
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static const struct ohci_driver_overrides platform_overrides __initconst = {
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.product_desc = "Aic OHCI controller",
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.extra_priv_size = sizeof(struct aic_ohci_platform_priv),
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};
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static struct usb_ohci_pdata ohci_platform_defaults = {
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.power_on = aic_ohci_platform_power_on,
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.power_suspend = aic_ohci_platform_power_off,
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.power_off = aic_ohci_platform_power_off,
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};
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static int aic_ohci_platform_probe(struct platform_device *dev)
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{
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struct usb_hcd *hcd;
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struct resource *res_mem;
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struct usb_ohci_pdata *pdata = &ohci_platform_defaults;
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struct aic_ohci_platform_priv *priv;
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struct ohci_hcd *ohci;
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int err, irq;
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#ifndef CONFIG_USB_OHCI_HCD_AIC
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int clk = 0;
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#endif
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if (usb_disabled())
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return -ENODEV;
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irq = platform_get_irq(dev, 0);
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if (irq < 0)
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return irq;
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res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
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if (!res_mem) {
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dev_err(&dev->dev, "no memory resource provided");
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return -ENXIO;
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}
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hcd = usb_create_hcd(&ohci_platform_hc_driver, &dev->dev,
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dev_name(&dev->dev));
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if (!hcd)
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return -ENOMEM;
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platform_set_drvdata(dev, hcd);
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dev->dev.platform_data = pdata;
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priv = hcd_to_ohci_priv(hcd);
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ohci = hcd_to_ohci(hcd);
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if (dev->dev.of_node) {
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if (of_property_read_bool(dev->dev.of_node, "big-endian-regs"))
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ohci->flags |= OHCI_QUIRK_BE_MMIO;
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if (of_property_read_bool(dev->dev.of_node, "big-endian-desc"))
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ohci->flags |= OHCI_QUIRK_BE_DESC;
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if (of_property_read_bool(dev->dev.of_node, "big-endian"))
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ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC;
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if (of_property_read_bool(dev->dev.of_node, "no-big-frame-no"))
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ohci->flags |= OHCI_QUIRK_FRAME_NO;
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if (of_property_read_bool(dev->dev.of_node,
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"remote-wakeup-connected"))
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ohci->hc_control = OHCI_CTRL_RWC;
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of_property_read_u32(dev->dev.of_node, "num-ports",
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&ohci->num_ports);
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}
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#ifndef CONFIG_USB_OHCI_HCD_AIC
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priv->phy = devm_phy_get(&dev->dev, "usb");
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if (IS_ERR(priv->phy)) {
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err = PTR_ERR(priv->phy);
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goto err_put_hcd;
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}
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for (clk = 0; clk < USB_MAX_CLKS; clk++) {
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priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);
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if (IS_ERR(priv->clks[clk])) {
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err = PTR_ERR(priv->clks[clk]);
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if (err == -EPROBE_DEFER)
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goto err_put_clks;
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priv->clks[clk] = NULL;
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break;
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}
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}
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/* some SoCs don't have a dedicated 48Mhz clock, but those that
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* do need the rate to be explicitly set
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*/
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priv->clk48 = devm_clk_get(&dev->dev, "clk48");
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if (IS_ERR(priv->clk48)) {
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dev_info(&dev->dev, "48MHz clk not found\n");
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priv->clk48 = NULL;
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}
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priv->pwr =
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devm_reset_control_get_optional_shared(&dev->dev, "power");
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if (IS_ERR(priv->pwr)) {
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err = PTR_ERR(priv->pwr);
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goto err_put_clks;
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}
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priv->rst =
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devm_reset_control_get_optional_shared(&dev->dev, "softreset");
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if (IS_ERR(priv->rst)) {
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err = PTR_ERR(priv->rst);
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goto err_put_clks;
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}
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#endif
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if (pdata->power_on) {
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err = pdata->power_on(dev);
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if (err < 0)
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goto err_power;
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}
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hcd->rsrc_start = res_mem->start;
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hcd->rsrc_len = resource_size(res_mem);
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hcd->regs = devm_ioremap_resource(&dev->dev, res_mem);
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if (IS_ERR(hcd->regs)) {
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err = PTR_ERR(hcd->regs);
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goto err_power;
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}
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err = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (err)
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goto err_power;
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device_wakeup_enable(hcd->self.controller);
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platform_set_drvdata(dev, hcd);
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return err;
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err_power:
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if (pdata->power_off)
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pdata->power_off(dev);
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#ifndef CONFIG_USB_OHCI_HCD_AIC
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err_put_clks:
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while (--clk >= 0)
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clk_put(priv->clks[clk]);
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err_put_hcd:
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#endif
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if (pdata == &ohci_platform_defaults)
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dev->dev.platform_data = NULL;
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usb_put_hcd(hcd);
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return err;
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}
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static int aic_ohci_platform_remove(struct platform_device *dev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(dev);
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struct usb_ohci_pdata *pdata = dev_get_platdata(&dev->dev);
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struct aic_ohci_platform_priv *priv = hcd_to_ohci_priv(hcd);
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int clk;
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usb_remove_hcd(hcd);
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if (pdata->power_off)
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pdata->power_off(dev);
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for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++)
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clk_put(priv->clks[clk]);
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usb_put_hcd(hcd);
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if (pdata == &ohci_platform_defaults)
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dev->dev.platform_data = NULL;
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int aic_ohci_suspend(struct device *dev)
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{
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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struct usb_ohci_pdata *pdata = dev->platform_data;
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struct platform_device *pdev = to_platform_device(dev);
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bool do_wakeup = device_may_wakeup(dev);
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int ret;
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ret = ohci_suspend(hcd, do_wakeup);
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if (ret)
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return ret;
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if (pdata->power_suspend)
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pdata->power_suspend(pdev);
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return ret;
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}
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static int aic_ohci_resume(struct device *dev)
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{
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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struct usb_ohci_pdata *pdata = dev_get_platdata(dev);
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struct platform_device *pdev = to_platform_device(dev);
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int err;
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if (pdata->power_on) {
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err = pdata->power_on(pdev);
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if (err < 0)
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return err;
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}
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ohci_resume(hcd, false);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(aic_ohci_pm_ops, aic_ohci_suspend, aic_ohci_resume);
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#endif /* CONFIG_PM_SLEEP */
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static const struct of_device_id aic_ohci_platform_ids[] = {
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{ .compatible = "artinchip,aic-ohci-v1.0", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, aic_ohci_platform_ids);
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static struct platform_driver ohci_platform_driver = {
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.probe = aic_ohci_platform_probe,
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.remove = aic_ohci_platform_remove,
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.shutdown = usb_hcd_platform_shutdown,
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.driver = {
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.name = "aic-ohci",
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#ifdef CONFIG_PM_SLEEP
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.pm = &aic_ohci_pm_ops,
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#endif
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.of_match_table = aic_ohci_platform_ids,
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}
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};
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static int __init ohci_platform_init(void)
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{
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if (usb_disabled())
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return -ENODEV;
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pr_info("%s: " DRIVER_DESC "\n", hcd_name);
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ohci_init_driver(&ohci_platform_hc_driver, &platform_overrides);
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return platform_driver_register(&ohci_platform_driver);
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}
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module_init(ohci_platform_init);
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static void __exit ohci_platform_cleanup(void)
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{
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platform_driver_unregister(&ohci_platform_driver);
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}
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module_exit(ohci_platform_cleanup);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL");
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