add two nand support

This commit is contained in:
hyx 2026-04-09 14:28:53 +08:00
parent 47f8fc5ac5
commit 0914843dc4
10 changed files with 26 additions and 5 deletions

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@ -34,6 +34,7 @@
#define NAND_MFR_TOSHIBA 0x98
#define NAND_MFR_WINBOND 0xef
#define NAND_MFR_FUDAN 0xa1
#define NAND_MFR_DOSIN 0xe5
/**
* struct nand_manufacturer_ops - NAND Manufacturer operations

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@ -4603,7 +4603,12 @@ static bool find_full_id_nand(struct nand_chip *chip,
memorg->oobsize = type->oobsize;
mtd->oobsize = memorg->oobsize;
memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
/* Check if chip is forced to SLC */
if (type->options & NAND_FORCE_SLC) {
memorg->bits_per_cell = 1;
} else {
memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
}
memorg->eraseblocks_per_lun =
DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20,
memorg->pagesize *

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@ -85,7 +85,10 @@ struct nand_flash_dev nand_flash_ids[] = {
{"GD5F1GQ5X",
{ .id = {0xC8, 0x51} },
SZ_2K, SZ_128, SZ_128K, 0, 2, 128, NAND_ECC_INFO(24, SZ_1K)},
SZ_2K, SZ_128, SZ_128K, NAND_FORCE_SLC, 2, 128, NAND_ECC_INFO(24, SZ_1K)},
{"GD5F1GM7X",
{ .id = {0xC8, 0x91} },
SZ_2K, SZ_128, SZ_128K, NAND_FORCE_SLC, 2, 128, NAND_ECC_INFO(24, SZ_1K)},
{"FM25S01A",
{ .id = {0xA1, 0xD4} },
SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(8, SZ_1K)},
@ -95,6 +98,9 @@ struct nand_flash_dev nand_flash_ids[] = {
{"XT26G01CWSIG 3.3V SPI",
{ .id = {0x0B, 0x11 } },
SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(8, SZ_1K)},
{"DS35Q1GA 3.3V SPI",
{ .id = {0xE5, 0x71 } },
SZ_2K, SZ_128, SZ_128K, NAND_FORCE_SLC, 2, 64, NAND_ECC_INFO(8, SZ_1K)},
LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
@ -228,6 +234,7 @@ static const struct nand_manufacturer_desc nand_manufacturer_descs[] = {
{NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops},
{NAND_MFR_WINBOND, "Winbond"},
{NAND_MFR_FUDAN, "FUDAN"},
{NAND_MFR_DOSIN, "DOSIN"},
};
/**

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@ -211,6 +211,12 @@ struct nand_chip;
#define NAND_NO_BBM_QUIRK BIT(27)
/* Cell info constants */
/*
* Force treating this chip as SLC regardless of ID data.
* Some chips with short ID (id_len <= 2) may have unreliable cellinfo byte.
*/
#define NAND_FORCE_SLC BIT(28)
#define NAND_CI_CHIPNR_MSK 0x03
#define NAND_CI_CELLTYPE_MSK 0x0C
#define NAND_CI_CELLTYPE_SHIFT 2

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@ -115,10 +115,14 @@ struct nand_flash_dev nand_flash_ids[] = {
SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(8, SZ_1K),
0 },
#endif
{"GD5F1GF5X 3.3V SPI",
{"GD5F1GQ5X 3.3V SPI",
{ .id = {0xC8, 0x51 } },
SZ_2K, SZ_128, SZ_128K, 0, 2, 128, NAND_ECC_INFO(24, SZ_1K),
0 },
{"GD5F1GM7X 3.3V SPI",
{ .id = {0xC8, 0x91 } },
SZ_2K, SZ_128, SZ_128K, 0, 2, 128, NAND_ECC_INFO(24, SZ_1K),
0 },
{"GD5F2GQ4U 3.3V SPI",
{ .id = {0xC8, 0xb2} },
SZ_2K, SZ_256, SZ_128K, 0, 2, 64, NAND_ECC_INFO(8, SZ_1K),

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@ -3,8 +3,6 @@ DONE=yes
REBOOT=yes
CMD:
env default -a;
qua_logo logo_update_1.jpg;fatload usb 0:1 40008000 u-boot-spl-header.img;nand erase.part boot-spl;nand write 40008000 boot-spl splfilesize;
qua_logo logo_update_1.jpg;fatload usb 0:1 40008000 u-boot.bin;nand erase.part boot-uboot;nand write 40008000 boot-uboot ubootfilesize;
qua_logo logo_update_1.jpg;fatload usb 0:1 40008000 logo.img;nand erase.part logo;nand write 40008000 logo logofilesize;
qua_logo logo_update_1.jpg;fatload usb 0:1 40008000 misc.img;nand erase.part misc;nand write 40008000 misc 1000;
qua_logo logo_update_1.jpg;fatload usb 0:1 40008000 recovery.img;nand erase.part recovery;nand write 40008000 recovery recoveryfilesize;