4.5lcm change,boot logo size change,stop init e_player

This commit is contained in:
zzh 2026-05-27 16:29:37 +08:00
parent 29a02e098b
commit c827225060
7 changed files with 50 additions and 50 deletions

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@ -234,9 +234,9 @@ static dsi_setting_tab_t qua_lcm_mipi_er88577b_6hc1017b7e_init_setting[] = {
{DSI_DI_DCS_WRITE_1_PARAM, 2, {0xFF, 0x00}}, {DSI_DI_DCS_WRITE_1_PARAM, 2, {0xFF, 0x00}},
//{DSI_DI_DCS_WRITE_1_PARAM, 2, {0xF1, 0xD2}},//BIST //{DSI_DI_DCS_WRITE_1_PARAM, 2, {0xF1, 0xD2}},//BIST
{DSI_DI_DCS_WRITE_1_PARAM, 2, {0x11, 0x00}}, // Sleep Out {DSI_DI_DCS_WRITE_1_PARAM, 2, {0x11, 0x00}}, // Sleep Out
{DSI_DI_DELAY, 200, {0x00}}, {DSI_DI_DELAY, 150, {0x00}}, // Delay 150ms (updated from 200ms)
{DSI_DI_DCS_WRITE_1_PARAM, 2, {0x29, 0x00}}, // Display On {DSI_DI_DCS_WRITE_1_PARAM, 2, {0x29, 0x00}}, // Display On
{DSI_DI_DELAY, 20, {0x00}}, {DSI_DI_DELAY, 120, {0x00}}, // Delay 120ms (updated from 20ms)
{DSI_DI_END_OF_TABLE, 0x00, {0}} {DSI_DI_END_OF_TABLE, 0x00, {0}}
#endif #endif
}; };
@ -552,28 +552,28 @@ static dsi_timing_t qua_lcm_mipi_er88577b_timing =
/*clk lane timing cfg*/ /*clk lane timing cfg*/
.clane.mode = 1, .clane.mode = 1,
.clane.lp11 = 0, .clane.lp11 = 0,
.clane.lp01 = 16, .clane.lp01 = 0,
.clane.zero = 0x22, .clane.zero = 13,
.clane.prepare = 0x7, .clane.prepare = 2,
.clane.pre = 0x4, .clane.pre = 3,
.clane.post = 0x10, .clane.post = 10,
.clane.trail = 0x9, .clane.trail = 3,
.clane.inittime = 0x10, .clane.inittime = 6,
.clane.exit = 0x10, .clane.exit = 6,
/*data lane timing cfg*/ /*data lane timing cfg*/
.dlane.mode = 1, .dlane.mode = 1,
.dlane.lp11 = 0, .dlane.lp11 = 0,
.dlane.lp01 = 0x10, .dlane.lp01 = 6, //dlane lpx
.dlane.zero = 13, .dlane.prepare = 3,
.dlane.prepare = 6, .dlane.zero = 4,
.dlane.trail = 10, .dlane.trail = 4,
.dlane.inittime = 16, .dlane.inittime = 6,
.dlane.exit = 16, .dlane.exit = 6,
/*data lane0 read timing cfg*/ /*data lane0 read timing cfg*/
.read.mode = 1, .read.mode = 1,
.read.tago = 67, .read.tago = 27,
.read.tasure = 25, .read.tasure = 10,
.read.taget = 84, .read.taget = 34,
/*clk cfg*/ /*clk cfg*/
.clk = { .clk = {
.vou.mode = 1, .vou.mode = 1,
@ -584,11 +584,11 @@ static dsi_timing_t qua_lcm_mipi_er88577b_timing =
.mif.pll_doubler = 0, .mif.pll_doubler = 0,
.mif.pll_div_s = 1, .mif.pll_div_s = 1,
.mif.pll_n = 0, .mif.pll_n = 0,
.mif.pll_kint = 3254779, .mif.pll_kint = 0x46dc5d,
.mif.pll_nint = 71, .mif.pll_nint = 0x38,
.mif.pixelclk_div = 12, .mif.pixelclk_div = 0,
.mif.pll_pdiv = 1, .mif.pll_pdiv = 2,
.mif.dhd_div = 1, .mif.dhd_div = 2,
} }
}; };

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@ -239,9 +239,9 @@ static dsi_setting_tab_t qua_lcm_mipi_er88577b_6hc1017b7e_init_setting[] = {
{DSI_DI_DCS_WRITE_1_PARAM, 2, {0xFF, 0x00}}, {DSI_DI_DCS_WRITE_1_PARAM, 2, {0xFF, 0x00}},
//{DSI_DI_DCS_WRITE_1_PARAM, 2, {0xF1, 0xD2}},//BIST //{DSI_DI_DCS_WRITE_1_PARAM, 2, {0xF1, 0xD2}},//BIST
{DSI_DI_DCS_WRITE_1_PARAM, 2, {0x11, 0x00}}, // Sleep Out {DSI_DI_DCS_WRITE_1_PARAM, 2, {0x11, 0x00}}, // Sleep Out
{DSI_DI_DELAY, 200, {0x00}}, {DSI_DI_DELAY, 150, {0x00}}, // Delay 150ms (updated from 200ms)
{DSI_DI_DCS_WRITE_1_PARAM, 2, {0x29, 0x00}}, // Display On {DSI_DI_DCS_WRITE_1_PARAM, 2, {0x29, 0x00}}, // Display On
{DSI_DI_DELAY, 20, {0x00}}, {DSI_DI_DELAY, 120, {0x00}}, // Delay 120ms (updated from 20ms)
{DSI_DI_END_OF_TABLE, 0x00, {0}} {DSI_DI_END_OF_TABLE, 0x00, {0}}
#endif #endif
}; };
@ -379,43 +379,43 @@ static dsi_timing_t qua_lcm_mipi_er88577b_timing =
/*clk lane timing cfg*/ /*clk lane timing cfg*/
.clane.mode = 1, .clane.mode = 1,
.clane.lp11 = 0, .clane.lp11 = 0,
.clane.lp01 = 16, .clane.lp01 = 0,
.clane.zero = 34, .clane.zero = 13,
.clane.prepare = 7, .clane.prepare = 2,
.clane.pre = 4, .clane.pre = 3,
.clane.post = 16, .clane.post = 10,
.clane.trail = 9, .clane.trail = 3,
.clane.inittime = 16, .clane.inittime = 6,
.clane.exit = 16, .clane.exit = 6,
/*data lane timing cfg*/ /*data lane timing cfg*/
.dlane.mode = 1, .dlane.mode = 1,
.dlane.lp11 = 0, .dlane.lp11 = 0,
.dlane.lp01 = 16, .dlane.lp01 = 6, //dlane lpx
.dlane.zero = 13, .dlane.prepare = 3,
.dlane.prepare = 6, .dlane.zero = 4,
.dlane.trail = 10, .dlane.trail = 4,
.dlane.inittime = 16, .dlane.inittime = 6,
.dlane.exit = 16, .dlane.exit = 6,
/*data lane0 read timing cfg*/ /*data lane0 read timing cfg*/
.read.mode = 1, .read.mode = 1,
.read.tago = 67, .read.tago = 27,
.read.tasure = 25, .read.tasure = 10,
.read.taget = 84, .read.taget = 34,
/*clk cfg*/ /*clk cfg*/
.clk = { .clk = {
.vou.mode = 1, .vou.mode = 1,
.vou.sel = 0x3, .vou.sel = 0x3,
.vou.div = 0, .vou.div = 0,
.mif.mode = 0, .mif.mode = 1,
.mif.pll_doubler = 0, .mif.pll_doubler = 0,
.mif.pll_div_s = 1, .mif.pll_div_s = 1,
.mif.pll_n = 0, .mif.pll_n = 0,
.mif.pll_kint = 5637144, .mif.pll_kint = 0x46dc5d,
.mif.pll_nint = 42, .mif.pll_nint = 0x38,
.mif.pixelclk_div = 12, .mif.pixelclk_div = 0,
.mif.pll_pdiv = 2, .mif.pll_pdiv = 2,
.mif.dhd_div = 1, .mif.dhd_div = 2,
} }
}; };

BIN
sdk/X-AIOS-LT00-V1.0.4/product/demo_ld/logo.img Executable file → Normal file

Binary file not shown.

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@ -4,4 +4,4 @@ export PATH=$PATH:/vendor/qua/ko:/vendor/qua/BT:/vendor/qua/wifi/bin:/system/qua
echo "Starting e_player..." echo "Starting e_player..."
cd /data/bin cd /data/bin
./e_player & #./e_player &

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@ -1,5 +1,5 @@
::sysinit:/etc/init.d/rcS ::sysinit:/etc/init.d/rcS
::respawn:-/bin/sh ::respawn:-/bin/sh
::restart:/sbin/init ::restart:/sbin/init
::respawn:/bin/e_player_wrapper #::respawn:/bin/e_player_wrapper
#::respawn:-/bin/daemon #::respawn:-/bin/daemon